Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts files. Signed-off-by: William Zhang --- arch/arm/boot/dts/bcm47622.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm63138.dtsi | 12 ++++++++++-- arch/arm/boot/dts/bcm63148.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm63178.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6756.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6846.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6855.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6878.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm947622.dts | 4 ++++ arch/arm/boot/dts/bcm963138.dts | 4 ++++ arch/arm/boot/dts/bcm963138dvt.dts | 12 +++++------- arch/arm/boot/dts/bcm963148.dts | 4 ++++ arch/arm/boot/dts/bcm963178.dts | 4 ++++ arch/arm/boot/dts/bcm96756.dts | 4 ++++ arch/arm/boot/dts/bcm96846.dts | 4 ++++ arch/arm/boot/dts/bcm96855.dts | 4 ++++ arch/arm/boot/dts/bcm96878.dts | 4 ++++ 17 files changed, 166 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi index cd25ed2757b7..401e1ce1da6d 100644 --- a/arch/arm/boot/dts/bcm47622.dtsi +++ b/arch/arm/boot/dts/bcm47622.dtsi @@ -137,6 +137,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index 93281c47c9ba..2c9939e775fb 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -224,12 +224,20 @@ hsspi: spi@1000 { nand_controller: nand-controller@2000 { #address-cells = <1>; #size-cells = <0>; - compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.0", "brcm,brcmnand"; reg = <0x2000 0x600>, <0xf0 0x10>; reg-names = "nand", "nand-int-base"; status = "disabled"; interrupts = ; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; + brcm,nand-use-wp = <0>; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; }; bootlut: bootlut@8000 { diff --git a/arch/arm/boot/dts/bcm63148.dtsi b/arch/arm/boot/dts/bcm63148.dtsi index ba7f265db121..de14d4564b14 100644 --- a/arch/arm/boot/dts/bcm63148.dtsi +++ b/arch/arm/boot/dts/bcm63148.dtsi @@ -118,5 +118,22 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x2000 0x600>, <0xf0 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; }; }; diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index d8268a1e889b..ae205408c5cd 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -128,6 +128,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6756.dtsi b/arch/arm/boot/dts/bcm6756.dtsi index 49ecc1f0c18c..bbff47172dc1 100644 --- a/arch/arm/boot/dts/bcm6756.dtsi +++ b/arch/arm/boot/dts/bcm6756.dtsi @@ -138,6 +138,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi index fbc7d3a5dc5f..26a36a577b44 100644 --- a/arch/arm/boot/dts/bcm6846.dtsi +++ b/arch/arm/boot/dts/bcm6846.dtsi @@ -118,5 +118,22 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; }; }; diff --git a/arch/arm/boot/dts/bcm6855.dtsi b/arch/arm/boot/dts/bcm6855.dtsi index 5e0fe26530f1..0defcc10ca8a 100644 --- a/arch/arm/boot/dts/bcm6855.dtsi +++ b/arch/arm/boot/dts/bcm6855.dtsi @@ -128,6 +128,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi index 96529d3d4dc2..f6ae07fe1b44 100644 --- a/arch/arm/boot/dts/bcm6878.dtsi +++ b/arch/arm/boot/dts/bcm6878.dtsi @@ -119,6 +119,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm947622.dts b/arch/arm/boot/dts/bcm947622.dts index 93b8ce22678d..22e3c4508e1a 100644 --- a/arch/arm/boot/dts/bcm947622.dts +++ b/arch/arm/boot/dts/bcm947622.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963138.dts b/arch/arm/boot/dts/bcm963138.dts index 1b405c249213..450289d47dc7 100644 --- a/arch/arm/boot/dts/bcm963138.dts +++ b/arch/arm/boot/dts/bcm963138.dts @@ -29,3 +29,7 @@ &serial0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts index b5af61853a07..f2140e512070 100644 --- a/arch/arm/boot/dts/bcm963138dvt.dts +++ b/arch/arm/boot/dts/bcm963138dvt.dts @@ -33,14 +33,12 @@ &serial1 { &nand_controller { status = "okay"; +}; - nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sectors-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sectors-size = <16>; }; &ahci { diff --git a/arch/arm/boot/dts/bcm963148.dts b/arch/arm/boot/dts/bcm963148.dts index 1f5d6d783f09..aa08b473c7cd 100644 --- a/arch/arm/boot/dts/bcm963148.dts +++ b/arch/arm/boot/dts/bcm963148.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963178.dts b/arch/arm/boot/dts/bcm963178.dts index d036e99dd8d1..c0f504ac43a4 100644 --- a/arch/arm/boot/dts/bcm963178.dts +++ b/arch/arm/boot/dts/bcm963178.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96756.dts b/arch/arm/boot/dts/bcm96756.dts index 8b104f3fb14a..2ce998f2b84f 100644 --- a/arch/arm/boot/dts/bcm96756.dts +++ b/arch/arm/boot/dts/bcm96756.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts index 55852c229608..f4b9a07370ee 100644 --- a/arch/arm/boot/dts/bcm96846.dts +++ b/arch/arm/boot/dts/bcm96846.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96855.dts b/arch/arm/boot/dts/bcm96855.dts index 2ad880af2104..5c94063bceaf 100644 --- a/arch/arm/boot/dts/bcm96855.dts +++ b/arch/arm/boot/dts/bcm96855.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts index b7af8ade7a9d..910f7e125bad 100644 --- a/arch/arm/boot/dts/bcm96878.dts +++ b/arch/arm/boot/dts/bcm96878.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; -- 2.37.3