* [PATCH for-rc 0/3] RDMA/hns: Improvements for function resource configuration
@ 2023-07-12 6:00 Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 1/3] RDMA/hns: support get xrcd num from firmware Junxian Huang
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Junxian Huang @ 2023-07-12 6:00 UTC (permalink / raw
To: jgg, leon; +Cc: linux-rdma, linuxarm, linux-kernel, huangjunxian6
Here are 3 patches involving function resource configuration.
1. #1: The first patch supports getting xrcd num from firmware.
2. #2: The second patch removes a redundant configuration in driver,
which is now handled by firmware.
3. #3: The third patch adds validity check for function resource and
adjusts the invalid ones.
Junxian Huang (2):
RDMA/hns: Remove VF extend configuration
RDMA/hns: Add check and adjust for function resource values
Luoyouming (1):
RDMA/hns: support get xrcd num from firmware
drivers/infiniband/hw/hns/hns_roce_device.h | 1 -
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 195 ++++++++++++--------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 50 +++--
3 files changed, 158 insertions(+), 88 deletions(-)
--
2.30.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH for-rc 1/3] RDMA/hns: support get xrcd num from firmware
2023-07-12 6:00 [PATCH for-rc 0/3] RDMA/hns: Improvements for function resource configuration Junxian Huang
@ 2023-07-12 6:00 ` Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 2/3] RDMA/hns: Remove VF extend configuration Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values Junxian Huang
2 siblings, 0 replies; 5+ messages in thread
From: Junxian Huang @ 2023-07-12 6:00 UTC (permalink / raw
To: jgg, leon; +Cc: linux-rdma, linuxarm, linux-kernel, huangjunxian6
From: Luoyouming <luoyouming@huawei.com>
Support driver get the num of xrcd from firmware
Signed-off-by: Luoyouming <luoyouming@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 5 ++---
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 3 ++-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index d4c6b9bc0a4e..fb3ce4af22b5 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -2093,9 +2093,6 @@ static void apply_func_caps(struct hns_roce_dev *hr_dev)
caps->qpc_timer_hop_num = HNS_ROCE_HOP_NUM_0;
caps->cqc_timer_hop_num = HNS_ROCE_HOP_NUM_0;
- caps->num_xrcds = HNS_ROCE_V2_MAX_XRCD_NUM;
- caps->reserved_xrcds = HNS_ROCE_V2_RSV_XRCD_NUM;
-
caps->num_srqwqe_segs = HNS_ROCE_V2_MAX_SRQWQE_SEGS;
caps->num_idx_segs = HNS_ROCE_V2_MAX_IDX_SEGS;
@@ -2218,6 +2215,7 @@ static int hns_roce_query_caps(struct hns_roce_dev *hr_dev)
caps->num_cqs = 1 << hr_reg_read(resp_c, PF_CAPS_C_NUM_CQS);
caps->gid_table_len[0] = hr_reg_read(resp_c, PF_CAPS_C_MAX_GID);
caps->max_cqes = 1 << hr_reg_read(resp_c, PF_CAPS_C_CQ_DEPTH);
+ caps->num_xrcds = 1 << hr_reg_read(resp_c, PF_CAPS_C_NUM_XRCDS);
caps->num_mtpts = 1 << hr_reg_read(resp_c, PF_CAPS_C_NUM_MRWS);
caps->num_qps = 1 << hr_reg_read(resp_c, PF_CAPS_C_NUM_QPS);
caps->max_qp_init_rdma = hr_reg_read(resp_c, PF_CAPS_C_MAX_ORD);
@@ -2238,6 +2236,7 @@ static int hns_roce_query_caps(struct hns_roce_dev *hr_dev)
caps->reserved_mrws = hr_reg_read(resp_e, PF_CAPS_E_RSV_MRWS);
caps->chunk_sz = 1 << hr_reg_read(resp_e, PF_CAPS_E_CHUNK_SIZE_SHIFT);
caps->reserved_cqs = hr_reg_read(resp_e, PF_CAPS_E_RSV_CQS);
+ caps->reserved_xrcds = hr_reg_read(resp_e, PF_CAPS_E_RSV_XRCDS);
caps->reserved_srqs = hr_reg_read(resp_e, PF_CAPS_E_RSV_SRQS);
caps->reserved_lkey = hr_reg_read(resp_e, PF_CAPS_E_RSV_LKEYS);
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 7033eae2407c..2b87f0cf06ec 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -42,7 +42,6 @@
#define HNS_ROCE_V2_MAX_SRQWQE_SEGS 0x1000000
#define HNS_ROCE_V2_MAX_IDX_SEGS 0x1000000
#define HNS_ROCE_V2_MAX_XRCD_NUM 0x1000000
-#define HNS_ROCE_V2_RSV_XRCD_NUM 0
#define HNS_ROCE_V2_QP_ACK_TIMEOUT_OFS_HIP08 10
@@ -1202,6 +1201,7 @@ struct hns_roce_query_pf_caps_c {
#define PF_CAPS_C_NUM_CQS PF_CAPS_C_FIELD_LOC(51, 32)
#define PF_CAPS_C_MAX_GID PF_CAPS_C_FIELD_LOC(60, 52)
#define PF_CAPS_C_CQ_DEPTH PF_CAPS_C_FIELD_LOC(86, 64)
+#define PF_CAPS_C_NUM_XRCDS PF_CAPS_C_FIELD_LOC(91, 87)
#define PF_CAPS_C_NUM_MRWS PF_CAPS_C_FIELD_LOC(115, 96)
#define PF_CAPS_C_NUM_QPS PF_CAPS_C_FIELD_LOC(147, 128)
#define PF_CAPS_C_MAX_ORD PF_CAPS_C_FIELD_LOC(155, 148)
@@ -1260,6 +1260,7 @@ struct hns_roce_query_pf_caps_e {
#define PF_CAPS_E_RSV_MRWS PF_CAPS_E_FIELD_LOC(19, 0)
#define PF_CAPS_E_CHUNK_SIZE_SHIFT PF_CAPS_E_FIELD_LOC(31, 20)
#define PF_CAPS_E_RSV_CQS PF_CAPS_E_FIELD_LOC(51, 32)
+#define PF_CAPS_E_RSV_XRCDS PF_CAPS_E_FIELD_LOC(63, 52)
#define PF_CAPS_E_RSV_SRQS PF_CAPS_E_FIELD_LOC(83, 64)
#define PF_CAPS_E_RSV_LKEYS PF_CAPS_E_FIELD_LOC(115, 96)
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH for-rc 2/3] RDMA/hns: Remove VF extend configuration
2023-07-12 6:00 [PATCH for-rc 0/3] RDMA/hns: Improvements for function resource configuration Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 1/3] RDMA/hns: support get xrcd num from firmware Junxian Huang
@ 2023-07-12 6:00 ` Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values Junxian Huang
2 siblings, 0 replies; 5+ messages in thread
From: Junxian Huang @ 2023-07-12 6:00 UTC (permalink / raw
To: jgg, leon; +Cc: linux-rdma, linuxarm, linux-kernel, huangjunxian6
Remove VF extend configuration since the relative registers are
configured in firmware currently.
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
---
drivers/infiniband/hw/hns/hns_roce_device.h | 1 -
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 84 +++------------------
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 10 ---
3 files changed, 10 insertions(+), 85 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h
index 84239b907de2..6084c1649000 100644
--- a/drivers/infiniband/hw/hns/hns_roce_device.h
+++ b/drivers/infiniband/hw/hns/hns_roce_device.h
@@ -714,7 +714,6 @@ struct hns_roce_caps {
u32 max_rq_sg;
u32 rsv0;
u32 num_qps;
- u32 num_pi_qps;
u32 reserved_qps;
u32 num_srqs;
u32 max_wqes;
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index fb3ce4af22b5..c4b92d8bd98a 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1698,29 +1698,6 @@ static int load_func_res_caps(struct hns_roce_dev *hr_dev, bool is_vf)
return 0;
}
-static int load_ext_cfg_caps(struct hns_roce_dev *hr_dev, bool is_vf)
-{
- struct hns_roce_cmq_desc desc;
- struct hns_roce_cmq_req *req = (struct hns_roce_cmq_req *)desc.data;
- struct hns_roce_caps *caps = &hr_dev->caps;
- u32 func_num, qp_num;
- int ret;
-
- hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_EXT_CFG, true);
- ret = hns_roce_cmq_send(hr_dev, &desc, 1);
- if (ret)
- return ret;
-
- func_num = is_vf ? 1 : max_t(u32, 1, hr_dev->func_num);
- qp_num = hr_reg_read(req, EXT_CFG_QP_PI_NUM) / func_num;
- caps->num_pi_qps = round_down(qp_num, HNS_ROCE_QP_BANK_NUM);
-
- qp_num = hr_reg_read(req, EXT_CFG_QP_NUM) / func_num;
- caps->num_qps = round_down(qp_num, HNS_ROCE_QP_BANK_NUM);
-
- return 0;
-}
-
static int load_pf_timer_res_caps(struct hns_roce_dev *hr_dev)
{
struct hns_roce_cmq_desc desc;
@@ -1741,50 +1718,37 @@ static int load_pf_timer_res_caps(struct hns_roce_dev *hr_dev)
return 0;
}
-static int query_func_resource_caps(struct hns_roce_dev *hr_dev, bool is_vf)
+static int hns_roce_query_pf_resource(struct hns_roce_dev *hr_dev)
{
struct device *dev = hr_dev->dev;
int ret;
- ret = load_func_res_caps(hr_dev, is_vf);
+ ret = load_func_res_caps(hr_dev, false);
if (ret) {
- dev_err(dev, "failed to load res caps, ret = %d (%s).\n", ret,
- is_vf ? "vf" : "pf");
+ dev_err(dev, "failed to load pf res caps, ret = %d.\n", ret);
return ret;
}
- if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
- ret = load_ext_cfg_caps(hr_dev, is_vf);
- if (ret)
- dev_err(dev, "failed to load ext cfg, ret = %d (%s).\n",
- ret, is_vf ? "vf" : "pf");
- }
+ ret = load_pf_timer_res_caps(hr_dev);
+ if (ret)
+ dev_err(dev, "failed to load pf timer resource, ret = %d.\n",
+ ret);
return ret;
}
-static int hns_roce_query_pf_resource(struct hns_roce_dev *hr_dev)
+static int hns_roce_query_vf_resource(struct hns_roce_dev *hr_dev)
{
struct device *dev = hr_dev->dev;
int ret;
- ret = query_func_resource_caps(hr_dev, false);
+ ret = load_func_res_caps(hr_dev, true);
if (ret)
- return ret;
-
- ret = load_pf_timer_res_caps(hr_dev);
- if (ret)
- dev_err(dev, "failed to load pf timer resource, ret = %d.\n",
- ret);
+ dev_err(dev, "failed to load vf res caps, ret = %d.\n", ret);
return ret;
}
-static int hns_roce_query_vf_resource(struct hns_roce_dev *hr_dev)
-{
- return query_func_resource_caps(hr_dev, true);
-}
-
static int __hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev,
u32 vf_id)
{
@@ -1867,24 +1831,6 @@ static int config_vf_hem_resource(struct hns_roce_dev *hr_dev, int vf_id)
return hns_roce_cmq_send(hr_dev, desc, 2);
}
-static int config_vf_ext_resource(struct hns_roce_dev *hr_dev, u32 vf_id)
-{
- struct hns_roce_cmq_desc desc;
- struct hns_roce_cmq_req *req = (struct hns_roce_cmq_req *)desc.data;
- struct hns_roce_caps *caps = &hr_dev->caps;
-
- hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_EXT_CFG, false);
-
- hr_reg_write(req, EXT_CFG_VF_ID, vf_id);
-
- hr_reg_write(req, EXT_CFG_QP_PI_NUM, caps->num_pi_qps);
- hr_reg_write(req, EXT_CFG_QP_PI_IDX, vf_id * caps->num_pi_qps);
- hr_reg_write(req, EXT_CFG_QP_NUM, caps->num_qps);
- hr_reg_write(req, EXT_CFG_QP_IDX, vf_id * caps->num_qps);
-
- return hns_roce_cmq_send(hr_dev, &desc, 1);
-}
-
static int hns_roce_alloc_vf_resource(struct hns_roce_dev *hr_dev)
{
u32 func_num = max_t(u32, 1, hr_dev->func_num);
@@ -1899,16 +1845,6 @@ static int hns_roce_alloc_vf_resource(struct hns_roce_dev *hr_dev)
vf_id, ret);
return ret;
}
-
- if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) {
- ret = config_vf_ext_resource(hr_dev, vf_id);
- if (ret) {
- dev_err(hr_dev->dev,
- "failed to config vf-%u ext res, ret = %d.\n",
- vf_id, ret);
- return ret;
- }
- }
}
return 0;
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index 2b87f0cf06ec..d9693f6cc802 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -219,7 +219,6 @@ enum hns_roce_opcode_type {
HNS_ROCE_OPC_QUERY_VF_RES = 0x850e,
HNS_ROCE_OPC_CFG_GMV_TBL = 0x850f,
HNS_ROCE_OPC_CFG_GMV_BT = 0x8510,
- HNS_ROCE_OPC_EXT_CFG = 0x8512,
HNS_ROCE_QUERY_RAM_ECC = 0x8513,
HNS_SWITCH_PARAMETER_CFG = 0x1033,
};
@@ -956,15 +955,6 @@ struct hns_roce_func_clear {
#define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_INTERVAL 40
#define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_FAIL_WAIT 20
-/* Fields of HNS_ROCE_OPC_EXT_CFG */
-#define EXT_CFG_VF_ID CMQ_REQ_FIELD_LOC(31, 0)
-#define EXT_CFG_QP_PI_IDX CMQ_REQ_FIELD_LOC(45, 32)
-#define EXT_CFG_QP_PI_NUM CMQ_REQ_FIELD_LOC(63, 48)
-#define EXT_CFG_QP_NUM CMQ_REQ_FIELD_LOC(87, 64)
-#define EXT_CFG_QP_IDX CMQ_REQ_FIELD_LOC(119, 96)
-#define EXT_CFG_LLM_IDX CMQ_REQ_FIELD_LOC(139, 128)
-#define EXT_CFG_LLM_NUM CMQ_REQ_FIELD_LOC(156, 144)
-
#define CFG_LLM_A_BA_L CMQ_REQ_FIELD_LOC(31, 0)
#define CFG_LLM_A_BA_H CMQ_REQ_FIELD_LOC(63, 32)
#define CFG_LLM_A_DEPTH CMQ_REQ_FIELD_LOC(76, 64)
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values
2023-07-12 6:00 [PATCH for-rc 0/3] RDMA/hns: Improvements for function resource configuration Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 1/3] RDMA/hns: support get xrcd num from firmware Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 2/3] RDMA/hns: Remove VF extend configuration Junxian Huang
@ 2023-07-12 6:00 ` Junxian Huang
2023-07-12 12:53 ` Leon Romanovsky
2 siblings, 1 reply; 5+ messages in thread
From: Junxian Huang @ 2023-07-12 6:00 UTC (permalink / raw
To: jgg, leon; +Cc: linux-rdma, linuxarm, linux-kernel, huangjunxian6
Currently, RoCE driver gets function resource values from firmware
without validity check. As these resources are mostly related to memory,
an invalid value may lead to serious consequence such as kernel panic.
This patch adds check for these resource values and adjusts the invalid
ones.
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 116 ++++++++++++++++++++-
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 37 +++++++
2 files changed, 149 insertions(+), 4 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index c4b92d8bd98a..dae0e6959fa0 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1650,6 +1650,98 @@ static int hns_roce_config_global_param(struct hns_roce_dev *hr_dev)
return hns_roce_cmq_send(hr_dev, &desc, 1);
}
+static const struct hns_roce_bt_num {
+ u32 res_offset;
+ u32 min;
+ u32 max;
+ enum hns_roce_res_invalid_flag invalid_flag;
+ enum hns_roce_res_revision revision;
+ bool vf_support;
+} bt_num_table[] = {
+ {RES_OFFSET_IN_CAPS(qpc_bt_num), 1,
+ MAX_QPC_BT_NUM, QPC_BT_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(srqc_bt_num), 1,
+ MAX_SRQC_BT_NUM, SRQC_BT_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(cqc_bt_num), 1,
+ MAX_CQC_BT_NUM, CQC_BT_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(mpt_bt_num), 1,
+ MAX_MPT_BT_NUM, MPT_BT_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(sl_num), 1,
+ MAX_SL_NUM, QID_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(sccc_bt_num), 1,
+ MAX_SCCC_BT_NUM, SCCC_BT_NUM_INVALID_FLAG, RES_FOR_ALL, true},
+ {RES_OFFSET_IN_CAPS(qpc_timer_bt_num), 1,
+ MAX_QPC_TIMER_BT_NUM, QPC_TIMER_BT_NUM_INVALID_FLAG,
+ RES_FOR_ALL, false},
+ {RES_OFFSET_IN_CAPS(cqc_timer_bt_num), 1,
+ MAX_CQC_TIMER_BT_NUM, CQC_TIMER_BT_NUM_INVALID_FLAG,
+ RES_FOR_ALL, false},
+ {RES_OFFSET_IN_CAPS(gmv_bt_num), 1,
+ MAX_GMV_BT_NUM, GMV_BT_NUM_INVALID_FLAG,
+ RES_FOR_HIP09, true},
+ {RES_OFFSET_IN_CAPS(smac_bt_num), 1,
+ MAX_SMAC_BT_NUM, SMAC_BT_NUM_INVALID_FLAG,
+ RES_FOR_HIP08, true},
+ {RES_OFFSET_IN_CAPS(sgid_bt_num), 1,
+ MAX_SGID_BT_NUM, SGID_BT_NUM_INVALID_FLAG,
+ RES_FOR_HIP08, true},
+};
+
+static inline bool check_res_is_supported(struct hns_roce_dev *hr_dev,
+ struct hns_roce_bt_num *bt_num_entry)
+{
+ if (!bt_num_entry->vf_support && hr_dev->is_vf)
+ return false;
+
+ if (bt_num_entry->revision == RES_FOR_HIP09 &&
+ hr_dev->pci_dev->revision <= PCI_REVISION_ID_HIP08)
+ return false;
+
+ if (bt_num_entry->revision == RES_FOR_HIP08 &&
+ hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
+ return false;
+
+ return true;
+}
+
+static inline void adjust_eqc_bt_num(struct hns_roce_caps *caps,
+ u16 *invalid_flag)
+{
+ if (caps->eqc_bt_num < caps->num_comp_vectors + caps->num_aeq_vectors ||
+ caps->eqc_bt_num > MAX_EQC_BT_NUM) {
+ caps->eqc_bt_num = caps->eqc_bt_num > MAX_EQC_BT_NUM ?
+ MAX_EQC_BT_NUM : caps->num_comp_vectors +
+ caps->num_aeq_vectors;
+ *invalid_flag |= 1 << EQC_BT_NUM_INVALID_FLAG;
+ }
+}
+
+static u16 adjust_res_caps(struct hns_roce_dev *hr_dev)
+{
+ struct hns_roce_caps *caps = &hr_dev->caps;
+ u16 invalid_flag = 0;
+ u32 min, max;
+ u32 *res;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(bt_num_table); i++) {
+ if (!check_res_is_supported(hr_dev, &bt_num_table[i]))
+ continue;
+
+ res = (u32 *)((void *)caps + bt_num_table[i].res_offset);
+ min = bt_num_table[i].min;
+ max = bt_num_table[i].max;
+ if (*res < min || *res > max) {
+ *res = *res < min ? min : max;
+ invalid_flag |= 1 << bt_num_table[i].invalid_flag;
+ }
+ }
+
+ adjust_eqc_bt_num(caps, &invalid_flag);
+
+ return invalid_flag;
+}
+
static int load_func_res_caps(struct hns_roce_dev *hr_dev, bool is_vf)
{
struct hns_roce_cmq_desc desc[2];
@@ -1730,11 +1822,19 @@ static int hns_roce_query_pf_resource(struct hns_roce_dev *hr_dev)
}
ret = load_pf_timer_res_caps(hr_dev);
- if (ret)
+ if (ret) {
dev_err(dev, "failed to load pf timer resource, ret = %d.\n",
ret);
+ return ret;
+ }
- return ret;
+ ret = adjust_res_caps(hr_dev);
+ if (ret)
+ dev_warn(dev,
+ "invalid resource values have been adjusted, invalid_flag = 0x%x.\n",
+ ret);
+
+ return 0;
}
static int hns_roce_query_vf_resource(struct hns_roce_dev *hr_dev)
@@ -1743,10 +1843,18 @@ static int hns_roce_query_vf_resource(struct hns_roce_dev *hr_dev)
int ret;
ret = load_func_res_caps(hr_dev, true);
- if (ret)
+ if (ret) {
dev_err(dev, "failed to load vf res caps, ret = %d.\n", ret);
+ return ret;
+ }
- return ret;
+ ret = adjust_res_caps(hr_dev);
+ if (ret)
+ dev_warn(dev,
+ "invalid resource values have been adjusted, invalid_flag = 0x%x.\n",
+ ret);
+
+ return 0;
}
static int __hns_roce_set_vf_switch_param(struct hns_roce_dev *hr_dev,
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index d9693f6cc802..c2d46383c88c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -972,6 +972,43 @@ struct hns_roce_func_clear {
#define CFG_GLOBAL_PARAM_1US_CYCLES CMQ_REQ_FIELD_LOC(9, 0)
#define CFG_GLOBAL_PARAM_UDP_PORT CMQ_REQ_FIELD_LOC(31, 16)
+enum hns_roce_res_invalid_flag {
+ QPC_BT_NUM_INVALID_FLAG,
+ SRQC_BT_NUM_INVALID_FLAG,
+ CQC_BT_NUM_INVALID_FLAG,
+ MPT_BT_NUM_INVALID_FLAG,
+ EQC_BT_NUM_INVALID_FLAG,
+ SMAC_BT_NUM_INVALID_FLAG,
+ SGID_BT_NUM_INVALID_FLAG,
+ QID_NUM_INVALID_FLAG,
+ SCCC_BT_NUM_INVALID_FLAG,
+ GMV_BT_NUM_INVALID_FLAG,
+ QPC_TIMER_BT_NUM_INVALID_FLAG,
+ CQC_TIMER_BT_NUM_INVALID_FLAG,
+};
+
+enum hns_roce_res_revision {
+ RES_FOR_HIP08,
+ RES_FOR_HIP09,
+ RES_FOR_ALL,
+};
+
+#define RES_OFFSET_IN_CAPS(res) \
+ (offsetof(struct hns_roce_caps, res))
+
+#define MAX_QPC_BT_NUM 2048
+#define MAX_SRQC_BT_NUM 512
+#define MAX_CQC_BT_NUM 512
+#define MAX_MPT_BT_NUM 512
+#define MAX_EQC_BT_NUM 512
+#define MAX_SMAC_BT_NUM 256
+#define MAX_SGID_BT_NUM 256
+#define MAX_SL_NUM 8
+#define MAX_SCCC_BT_NUM 512
+#define MAX_GMV_BT_NUM 256
+#define MAX_QPC_TIMER_BT_NUM 1728
+#define MAX_CQC_TIMER_BT_NUM 1600
+
/*
* Fields of HNS_ROCE_OPC_QUERY_PF_RES, HNS_ROCE_OPC_QUERY_VF_RES
* and HNS_ROCE_OPC_ALLOC_VF_RES
--
2.30.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values
2023-07-12 6:00 ` [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values Junxian Huang
@ 2023-07-12 12:53 ` Leon Romanovsky
0 siblings, 0 replies; 5+ messages in thread
From: Leon Romanovsky @ 2023-07-12 12:53 UTC (permalink / raw
To: Junxian Huang; +Cc: jgg, linux-rdma, linuxarm, linux-kernel
On Wed, Jul 12, 2023 at 02:00:33PM +0800, Junxian Huang wrote:
> Currently, RoCE driver gets function resource values from firmware
> without validity check. As these resources are mostly related to memory,
> an invalid value may lead to serious consequence such as kernel panic.
>
> This patch adds check for these resource values and adjusts the invalid
> ones.
>
> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
> ---
> drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 116 ++++++++++++++++++++-
> drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 37 +++++++
> 2 files changed, 149 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> index c4b92d8bd98a..dae0e6959fa0 100644
> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> @@ -1650,6 +1650,98 @@ static int hns_roce_config_global_param(struct hns_roce_dev *hr_dev)
> return hns_roce_cmq_send(hr_dev, &desc, 1);
> }
<...>
> +static inline bool check_res_is_supported(struct hns_roce_dev *hr_dev,
> + struct hns_roce_bt_num *bt_num_entry)
> +{
<...>
> +static inline void adjust_eqc_bt_num(struct hns_roce_caps *caps,
> + u16 *invalid_flag)
> +{
No inline functions in *.c files.
Thanks
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2023-07-12 12:53 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-07-12 6:00 [PATCH for-rc 0/3] RDMA/hns: Improvements for function resource configuration Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 1/3] RDMA/hns: support get xrcd num from firmware Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 2/3] RDMA/hns: Remove VF extend configuration Junxian Huang
2023-07-12 6:00 ` [PATCH for-rc 3/3] RDMA/hns: Add check and adjust for function resource values Junxian Huang
2023-07-12 12:53 ` Leon Romanovsky
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).