From: "Arınç ÜNAL via B4 Relay" <devnull+arinc.unal.arinc9.com@kernel.org>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
"Arınç ÜNAL" <arinc.unal@arinc9.com>
Subject: [PATCH 2/2] arm64: dts: mediatek: mt7986: set PHY address of MT7531 switch to 0x1f
Date: Thu, 14 Mar 2024 15:20:05 +0300 [thread overview]
Message-ID: <20240314-for-mediatek-mt7531-phy-address-v1-2-52f58db01acd@arinc9.com> (raw)
In-Reply-To: <20240314-for-mediatek-mt7531-phy-address-v1-0-52f58db01acd@arinc9.com>
From: Arınç ÜNAL <arinc.unal@arinc9.com>
The MT7531 switch listens on PHY address 0x1f on an MDIO bus. I've got two
findings that support this. There's no bootstrapping option to change the
PHY address of the switch. The Linux driver hardcodes 0x1f as the PHY
address of the switch. So the reg property on the device tree is currently
ignored by the Linux driver.
Therefore, describe the correct PHY address on boards that have this
switch. This is already the case on all MT7986 boards here, so use
hexadecimal numbering and align the switch node name with the reg value.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 4 ++--
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 4 ++--
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
index e04b1c0c0ebb..2f92f8cfd8a3 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts
@@ -200,9 +200,9 @@ mdio: mdio-bus {
};
&mdio {
- switch: switch@31 {
+ switch: switch@1f {
compatible = "mediatek,mt7531";
- reg = <31>;
+ reg = <0x1f>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&pio 66 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 5d8e3d3f6c20..47f75ece1872 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -84,9 +84,9 @@ mdio: mdio-bus {
};
&mdio {
- switch: switch@0 {
+ switch: switch@1f {
compatible = "mediatek,mt7531";
- reg = <31>;
+ reg = <0x1f>;
reset-gpios = <&pio 5 0>;
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
index 58f77d932429..5148a69f4729 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
@@ -61,9 +61,9 @@ mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
- switch@0 {
+ switch@1f {
compatible = "mediatek,mt7531";
- reg = <31>;
+ reg = <0x1f>;
reset-gpios = <&pio 5 0>;
ports {
--
2.40.1
next prev parent reply other threads:[~2024-03-14 12:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-14 12:20 [PATCH 0/2] Set PHY address of MT7531 switch to 0x1f on MediaTek arm64 boards Arınç ÜNAL via B4 Relay
2024-03-14 12:20 ` [PATCH 1/2] arm64: dts: mediatek: mt7622: set PHY address of MT7531 switch to 0x1f Arınç ÜNAL via B4 Relay
2024-03-15 17:26 ` Florian Fainelli
2024-03-16 7:43 ` Arınç ÜNAL
2024-03-18 13:02 ` Florian Fainelli
2024-03-18 15:26 ` Arınç ÜNAL
2024-03-18 15:38 ` Florian Fainelli
2024-03-18 15:50 ` Arınç ÜNAL
2024-03-14 12:20 ` Arınç ÜNAL via B4 Relay [this message]
2024-04-27 1:28 ` [PATCH 2/2] arm64: dts: mediatek: mt7986: " Daniel Golle
2024-03-15 15:50 ` [PATCH 0/2] Set PHY address of MT7531 switch to 0x1f on MediaTek arm64 boards Rob Herring
2024-03-31 9:28 ` arinc.unal
2024-04-08 7:22 ` Arınç ÜNAL
2024-04-23 9:16 ` Arınç ÜNAL
2024-04-26 12:15 ` Arınç ÜNAL
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