* [PATCH 0/4] Arranging mux and macro update
@ 2024-04-15 6:24 Udit Kumar
0 siblings, 0 replies; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:24 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
This series aims to align ordering of pin muxes in following order
main_pmx0/1, wkup_pmx0/1/2/3 along with two fixes for 784s4-evm
and am69 for UART pin type.
Also, updating pin mux macro of J784S4 SOC instead of J721S2 for 784s4-evm
and am69 at few places.
Sorry for this cosmetic push, but usages of pin muxes was not consistent
across the platforms, and even for j784s4-evm wkup_pmx1 was coded at two
place.
For fixes, these errors should be caught during review but missed due to
cross reference is taken from tool's output.
Note to self, don't always rely on tool's output while reviewing the patch.
Boot logs
https://gist.github.com/uditkumarti/089777a8c31482a67be35aa0ab3cefe9
Udit Kumar (4):
arm64: dts: ti: k3-j784s4-evm: Arranging mux and macro update
arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro update
arm64: dts: ti: k3-j7200: Arranging pin mux in order
arm64: dts: ti: k3-j721s2: Arranging pin mux in order
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 12 +-
.../dts/ti/k3-j7200-common-proc-board.dts | 132 +++++++++---------
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 31 ++--
.../dts/ti/k3-j721s2-common-proc-board.dts | 30 ++--
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 32 ++---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 116 ++++++++-------
6 files changed, 175 insertions(+), 178 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/4] Arranging mux and macro update
@ 2024-04-15 6:33 Udit Kumar
2024-04-15 6:33 ` [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: " Udit Kumar
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:33 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
I need to resend this, as previous git send-email
just sent cover note and timeout after that.
This series aims to align ordering of pin muxes in following order
main_pmx0/1, wkup_pmx0/1/2/3 along with two fixes for 784s4-evm
and am69 for UART pin type.
Also, updating pin mux macro of J784S4 SOC instead of J721S2 for 784s4-evm
and am69 at few places.
Sorry for this cosmetic push, but usages of pin muxes was not consistent
across the platforms, and even for j784s4-evm wkup_pmx1 was coded at two
place.
For fixes, these errors should be caught during review but missed due to
cross reference is taken from tool's output.
Note to self, don't always rely on tool's output while reviewing the patch.
Boot logs
https://gist.github.com/uditkumarti/089777a8c31482a67be35aa0ab3cefe9
Udit Kumar (4):
arm64: dts: ti: k3-j784s4-evm: Arranging mux and macro update
arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro update
arm64: dts: ti: k3-j7200: Arranging pin mux in order
arm64: dts: ti: k3-j721s2: Arranging pin mux in order
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 12 +-
.../dts/ti/k3-j7200-common-proc-board.dts | 132 +++++++++---------
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 31 ++--
.../dts/ti/k3-j721s2-common-proc-board.dts | 30 ++--
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 32 ++---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 116 ++++++++-------
6 files changed, 175 insertions(+), 178 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: Arranging mux and macro update
2024-04-15 6:33 [PATCH 0/4] Arranging mux and macro update Udit Kumar
@ 2024-04-15 6:33 ` Udit Kumar
2024-04-15 7:31 ` Francesco Dolcini
2024-04-15 6:33 ` [PATCH 2/4] arm64: dts: ti: k3-am69-sk: Fix UART pin type " Udit Kumar
` (2 subsequent siblings)
3 siblings, 1 reply; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:33 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
Updating J784S4 macro for pin mux instead of J721S2.
Also arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3
along with fixing pin type for TX as output of wkup_uart.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 116 +++++++++++------------
1 file changed, 56 insertions(+), 60 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index 81fd7afac8c5..1424c6be8e39 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -338,21 +338,73 @@ J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */
};
};
+&wkup_pmx0 {
+ bootph-all;
+ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
+ J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
+ J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */
+ J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */
+ J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */
+ J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */
+ J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */
+ J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
+ J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
+ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
+ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
+ >;
+ };
+};
+
+&wkup_pmx1 {
+ bootph-all;
+ mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
+ J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
+ >;
+ };
+
+ pmic_irq_pins_default: pmic-irq-default-pins {
+ pinctrl-single,pins = <
+ /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
+ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
+ >;
+ };
+
+ mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
+ bootph-all;
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
+ J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
+ J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
+ J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
+ J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
+ J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
+ J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
+ J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
+ >;
+ };
+};
+
&wkup_pmx2 {
bootph-all;
wkup_uart0_pins_default: wkup-uart0-default-pins {
bootph-all;
pinctrl-single,pins = <
- J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
- J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
+ J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
+ J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */
>;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
bootph-all;
pinctrl-single,pins = <
- J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
- J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
+ J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
+ J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
>;
};
@@ -417,62 +469,6 @@ J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */
};
};
-&wkup_pmx1 {
- status = "okay";
-
- pmic_irq_pins_default: pmic-irq-default-pins {
- pinctrl-single,pins = <
- /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
- J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7)
- >;
- };
-};
-
-&wkup_pmx0 {
- bootph-all;
- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
- bootph-all;
- pinctrl-single,pins = <
- J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */
- J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */
- J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */
- J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */
- J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */
- J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */
- J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */
- J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */
- J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */
- J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */
- J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */
- >;
- };
-};
-
-&wkup_pmx1 {
- bootph-all;
- mcu_fss0_ospi0_1_pins_default: mcu-fss0-ospi0-1-default-pins {
- bootph-all;
- pinctrl-single,pins = <
- J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 6) /* (C32) MCU_OSPI0_ECC_FAIL */
- J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_RESET_OUT0 */
- >;
- };
-
- mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
- bootph-all;
- pinctrl-single,pins = <
- J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */
- J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */
- J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (E35) MCU_OSPI1_D0 */
- J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (D31) MCU_OSPI1_D1 */
- J784S4_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (G31) MCU_OSPI1_D2 */
- J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (F33) MCU_OSPI1_D3 */
- J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F31) MCU_OSPI1_DQS */
- J784S4_WKUP_IOPAD(0x00C, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */
- >;
- };
-};
-
&wkup_uart0 {
/* Firmware usage */
status = "reserved";
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/4] arm64: dts: ti: k3-am69-sk: Fix UART pin type and macro update
2024-04-15 6:33 [PATCH 0/4] Arranging mux and macro update Udit Kumar
2024-04-15 6:33 ` [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: " Udit Kumar
@ 2024-04-15 6:33 ` Udit Kumar
2024-04-15 6:33 ` [PATCH 3/4] arm64: dts: ti: k3-j7200: Arranging pin mux in order Udit Kumar
2024-04-15 6:33 ` [PATCH 4/4] arm64: dts: ti: k3-j721s2: " Udit Kumar
3 siblings, 0 replies; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:33 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
Along with updating J784S4 macro for pin mux instead of J721S2
fixing wkup UART RTS and TX pins as OUTPUT instead of INPUT.
Fixes: 45299dd1991b ("arm64: dts: ti: k3-am69-sk: Add mcu and wakeup uarts")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 50de2a448a3a..8d40a0351020 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -517,18 +517,18 @@ J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 7)
wkup_uart0_pins_default: wkup-uart0-default-pins {
bootph-all;
pinctrl-single,pins = <
- J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
- J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
- J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
- J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
+ J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (L37) WKUP_UART0_CTSn */
+ J784S4_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_UART0_RTSn */
+ J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
+ J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */
>;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
bootph-all;
pinctrl-single,pins = <
- J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
- J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
+ J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
+ J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
>;
};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/4] arm64: dts: ti: k3-j7200: Arranging pin mux in order
2024-04-15 6:33 [PATCH 0/4] Arranging mux and macro update Udit Kumar
2024-04-15 6:33 ` [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: " Udit Kumar
2024-04-15 6:33 ` [PATCH 2/4] arm64: dts: ti: k3-am69-sk: Fix UART pin type " Udit Kumar
@ 2024-04-15 6:33 ` Udit Kumar
2024-04-15 6:33 ` [PATCH 4/4] arm64: dts: ti: k3-j721s2: " Udit Kumar
3 siblings, 0 replies; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:33 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
Arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 132 +++++++++---------
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 31 ++--
2 files changed, 82 insertions(+), 81 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 6593c5da82c0..c53f31fff8d6 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -118,6 +118,72 @@ transceiver3: can-phy3 {
};
};
+&main_pmx0 {
+ main_uart0_pins_default: main-uart0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
+ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
+ J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
+ J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
+ >;
+ };
+
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
+ J721E_IOPAD(0xbc, PIN_OUTPUT, 0) /* (T20) UART1_TXD */
+ >;
+ };
+
+ main_uart3_pins_default: main-uart3-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
+ J721E_IOPAD(0x30, PIN_OUTPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
+ J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
+ J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
+ J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
+ J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
+ J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
+ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
+ J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
+ J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
+ >;
+ };
+
+ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
+ >;
+ };
+
+ main_mcan3_pins_default: main-mcan3-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
+ J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
+ >;
+ };
+};
+
+&main_pmx1 {
+ main_usbss0_pins_default: main-usbss0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
+ >;
+ };
+};
+
&wkup_pmx0 {
};
@@ -196,72 +262,6 @@ J721E_WKUP_IOPAD(0x60, PIN_INPUT, 7) /* (D14) WKUP_GPIO0_2 */
};
};
-&main_pmx0 {
- main_uart0_pins_default: main-uart0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
- J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
- J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
- J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
- >;
- };
-
- main_uart1_pins_default: main-uart1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
- J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
- >;
- };
-
- main_uart3_pins_default: main-uart3-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
- J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
- >;
- };
-
- main_i2c1_pins_default: main-i2c1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
- J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
- >;
- };
-
- main_mmc1_pins_default: main-mmc1-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
- J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
- J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
- J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
- J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
- J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
- J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
- J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
- >;
- };
-
- vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
- >;
- };
-
- main_mcan3_pins_default: main-mcan3-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x3c, PIN_INPUT, 0) /* (W16) MCAN3_RX */
- J721E_IOPAD(0x38, PIN_OUTPUT, 0) /* (Y21) MCAN3_TX */
- >;
- };
-};
-
-&main_pmx1 {
- main_usbss0_pins_default: main-usbss0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
- >;
- };
-};
-
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "reserved";
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index 7e6a584ac6f0..d9eddc5191b1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -103,6 +103,22 @@ transceiver0: can-phy0 {
};
};
+&main_pmx0 {
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
+ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
+ >;
+ };
+
+ main_mcan0_pins_default: main-mcan0-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */
+ J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */
+ >;
+ };
+};
+
&wkup_pmx0 {
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
pinctrl-single,pins = <
@@ -156,21 +172,6 @@ J721E_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */
};
};
-&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
- J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
- >;
- };
-
- main_mcan0_pins_default: main-mcan0-default-pins {
- pinctrl-single,pins = <
- J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */
- J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */
- >;
- };
-};
&hbmc {
/* OSPI and HBMC are muxed inside FSS, Bootloader will enable
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 4/4] arm64: dts: ti: k3-j721s2: Arranging pin mux in order
2024-04-15 6:33 [PATCH 0/4] Arranging mux and macro update Udit Kumar
` (2 preceding siblings ...)
2024-04-15 6:33 ` [PATCH 3/4] arm64: dts: ti: k3-j7200: Arranging pin mux in order Udit Kumar
@ 2024-04-15 6:33 ` Udit Kumar
3 siblings, 0 replies; 8+ messages in thread
From: Udit Kumar @ 2024-04-15 6:33 UTC (permalink / raw
To: nm, vigneshr, linux-arm-kernel, devicetree
Cc: kristo, robh, krzk+dt, conor+dt, linux-kernel, Udit Kumar
Arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
---
.../dts/ti/k3-j721s2-common-proc-board.dts | 30 ++++++++---------
arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 32 +++++++++----------
2 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c5a0b7cbb14f..55b2087117db 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -194,6 +194,21 @@ J721S2_IOPAD(0x038, PIN_OUTPUT, 0) /* (AB28) MCASP0_ACLKX.MCAN5_TX */
};
};
+&wkup_pmx1 {
+ mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
+ pinctrl-single,pins = <
+ J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
+ J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
+ J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
+ J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
+ J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
+ J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
+ J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */
+ J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
+ >;
+ };
+};
+
&wkup_pmx2 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
@@ -289,21 +304,6 @@ J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */
};
};
-&wkup_pmx1 {
- mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
- pinctrl-single,pins = <
- J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */
- J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */
- J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */
- J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */
- J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */
- J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */
- J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */
- J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */
- >;
- };
-};
-
&main_gpio0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
index 623c8421525d..14f1d2020f57 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
@@ -153,6 +153,22 @@ transceiver0: can-phy0 {
};
};
+&main_pmx0 {
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
+ J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
+ >;
+ };
+
+ main_mcan16_pins_default: main-mcan16-default-pins {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
+ J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
+ >;
+ };
+};
+
&wkup_pmx0 {
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
pinctrl-single,pins = <
@@ -190,22 +206,6 @@ J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
};
};
-&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-default-pins {
- pinctrl-single,pins = <
- J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
- J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
- >;
- };
-
- main_mcan16_pins_default: main-mcan16-default-pins {
- pinctrl-single,pins = <
- J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
- J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
- >;
- };
-};
-
&wkup_i2c0 {
status = "okay";
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: Arranging mux and macro update
2024-04-15 6:33 ` [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: " Udit Kumar
@ 2024-04-15 7:31 ` Francesco Dolcini
2024-04-15 7:38 ` Kumar, Udit
0 siblings, 1 reply; 8+ messages in thread
From: Francesco Dolcini @ 2024-04-15 7:31 UTC (permalink / raw
To: Udit Kumar
Cc: nm, vigneshr, linux-arm-kernel, devicetree, kristo, robh, krzk+dt,
conor+dt, linux-kernel
Hello,
On Mon, Apr 15, 2024 at 12:03:26PM +0530, Udit Kumar wrote:
> Updating J784S4 macro for pin mux instead of J721S2.
>
> Also arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3
> along with fixing pin type for TX as output of wkup_uart.
Are you doing a refactoring + fixes in the same commit or I
misunderstood your commit message?
If this is the case I would suggest to have separate commit for the fix
and the refactoring, with the fix being first in the series and with a
fixes tag.
From a quick look, this comment may apply to other commits in the
series.
Thanks,
Francesco
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: Arranging mux and macro update
2024-04-15 7:31 ` Francesco Dolcini
@ 2024-04-15 7:38 ` Kumar, Udit
0 siblings, 0 replies; 8+ messages in thread
From: Kumar, Udit @ 2024-04-15 7:38 UTC (permalink / raw
To: Francesco Dolcini
Cc: nm, vigneshr, linux-arm-kernel, devicetree, kristo, robh, krzk+dt,
conor+dt, linux-kernel
Hi Francesco,
On 4/15/2024 1:01 PM, Francesco Dolcini wrote:
> Hello,
>
> On Mon, Apr 15, 2024 at 12:03:26PM +0530, Udit Kumar wrote:
>> Updating J784S4 macro for pin mux instead of J721S2.
>>
>> Also arranging pin mux in order of main_pmx0/1, wkup_pmx0/1/2/3
>> along with fixing pin type for TX as output of wkup_uart.
> Are you doing a refactoring + fixes in the same commit or I
> misunderstood your commit message?
>
> If this is the case I would suggest to have separate commit for the fix
> and the refactoring, with the fix being first in the series and with a
> fixes tag.
>
> From a quick look, this comment may apply to other commits in the
> series.
will split into two series Fixes and refactor .
> Thanks,
> Francesco
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2024-04-15 7:38 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2024-04-15 6:33 [PATCH 0/4] Arranging mux and macro update Udit Kumar
2024-04-15 6:33 ` [PATCH 1/4] arm64: dts: ti: k3-j784s4-evm: " Udit Kumar
2024-04-15 7:31 ` Francesco Dolcini
2024-04-15 7:38 ` Kumar, Udit
2024-04-15 6:33 ` [PATCH 2/4] arm64: dts: ti: k3-am69-sk: Fix UART pin type " Udit Kumar
2024-04-15 6:33 ` [PATCH 3/4] arm64: dts: ti: k3-j7200: Arranging pin mux in order Udit Kumar
2024-04-15 6:33 ` [PATCH 4/4] arm64: dts: ti: k3-j721s2: " Udit Kumar
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