From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E5C9199E9C; Thu, 18 Apr 2024 22:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713478515; cv=none; b=qPhgTygUXDQEUf04XrArIyu8zWune5yrduJ+Tis4spx6PBwCwCZ6NSzxItin6RyuBObUA9ZM/abig45mBR8E00tI2JodzR8H1zz3fMjLYN7UNqAB5ptl3tJTPVPUyHGInzwe3Xo4h+loJVCIvIW90UpeqjBEXoHzPyIUguwdQxc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713478515; c=relaxed/simple; bh=4XDdDRUpE2SzLJEnTjm/tzrFQrSRxaWLCVaNS+cKF4s=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kSUeKgXOW8VY5QC/KKD0g6Jvr10FyCspvdElSSeezDkjGZ62K1gjBohzjt/lZqcQBDYlKphOc3ciAfkr/23n2UTrfel+EJ1P+xhBs10TMv6bdkCWTvx54orhhFdZJPwEHlvUii7dcygxHLgxk4yhPsgXAV1yddAYNMA8/nJpRXs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=NQIZc37C; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="NQIZc37C" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43IMEHGH042839; Thu, 18 Apr 2024 17:14:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1713478458; bh=xYz+Hxiu0MGSVC9xGRT40sXJJX7R9jt5ZL8YvokWLGA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NQIZc37CkkK/QY/ZqhCod6rjK+0ENpV3V8Mi3wtReEvSMVwEwRYZwm0+J0SMAme00 4cAS3Inq/W5QxnQTUARFhRQfe+M+5FM4VgzS2np8HtOT4oPwhji+p/FNzP5By/PsoD jHMgdPEx9899Mo/NlrUuBpAxvGyDk4s3dZytGOqI= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43IMEH42008307 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 18 Apr 2024 17:14:17 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 18 Apr 2024 17:14:17 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 18 Apr 2024 17:14:17 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43IMEHqr111027; Thu, 18 Apr 2024 17:14:17 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , William Breathitt Gray CC: David Lechner , , , , Subject: [PATCH 3/7] arm64: dts: ti: k3-am62p-main: Add eQEP nodes Date: Thu, 18 Apr 2024 17:14:13 -0500 Message-ID: <20240418221417.1592787-4-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240418221417.1592787-1-jm@ti.com> References: <20240418221417.1592787-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Add eQEP DT nodes 0-2 for AM62P5 SoC. Since external hardware was needed to test eQEP, the DT nodes for eQEP were not included in the introductory commit. Now that eQEP has been validated, add nodes to k3-am62p-main.dtsi. Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs") Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 30 +++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi index 88bc64111234b..22f02b5bc8d4f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -805,6 +805,36 @@ ecap2: pwm@23120000 { status = "disabled"; }; + eqep0: counter@23200000 { + compatible = "ti,am3352-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 59 0>; + clock-names = "fck"; + interrupts = ; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am3352-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 60 0>; + clock-names = "fck"; + interrupts = ; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am3352-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 62 0>; + clock-names = "fck"; + interrupts = ; + status = "disabled"; + }; + main_mcan0: can@20701000 { compatible = "bosch,m_can"; reg = <0x00 0x20701000 0x00 0x200>, -- 2.43.2