From: "Arınç ÜNAL via B4 Relay" <devnull+arinc.unal.arinc9.com@kernel.org>
To: Daniel Golle <daniel@makrotopia.org>,
DENG Qingfang <dqfext@gmail.com>,
Sean Wang <sean.wang@mediatek.com>, Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Russell King <linux@armlinux.org.uk>
Cc: "Bartel Eerdekens" <bartel.eerdekens@constell8.be>,
mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
"Arınç ÜNAL" <arinc.unal@arinc9.com>
Subject: [PATCH net-next v2 03/15] net: dsa: mt7530: rename p5_intf_sel and use only for MT7530 switch
Date: Mon, 22 Apr 2024 10:15:10 +0300 [thread overview]
Message-ID: <20240422-for-netnext-mt7530-improvements-4-v2-3-a75157ba76ad@arinc9.com> (raw)
In-Reply-To: <20240422-for-netnext-mt7530-improvements-4-v2-0-a75157ba76ad@arinc9.com>
From: Arınç ÜNAL <arinc.unal@arinc9.com>
The p5_intf_sel pointer is used to store the information of whether PHY
muxing is used or not. PHY muxing is a feature specific to port 5 of the
MT7530 switch. Do not use it for other switch models.
Rename the pointer to p5_mode to store the mode the port is being used in.
Rename the p5_interface_select enum to mt7530_p5_mode, the string
representation to mt7530_p5_mode_str, and the enum elements.
If PHY muxing is not detected, the default mode, GMAC5, will be used.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
---
drivers/net/dsa/mt7530.c | 62 ++++++++++++++++++++----------------------------
drivers/net/dsa/mt7530.h | 15 ++++++------
2 files changed, 33 insertions(+), 44 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 8dee9cee1104..5b6aeeddb5d9 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -857,19 +857,15 @@ mt7530_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
return 0;
}
-static const char *p5_intf_modes(unsigned int p5_interface)
-{
- switch (p5_interface) {
- case P5_DISABLED:
- return "DISABLED";
- case P5_INTF_SEL_PHY_P0:
- return "PHY P0";
- case P5_INTF_SEL_PHY_P4:
- return "PHY P4";
- case P5_INTF_SEL_GMAC5:
- return "GMAC5";
+static const char *mt7530_p5_mode_str(unsigned int mode)
+{
+ switch (mode) {
+ case MUX_PHY_P0:
+ return "MUX PHY P0";
+ case MUX_PHY_P4:
+ return "MUX PHY P4";
default:
- return "unknown";
+ return "GMAC5";
}
}
@@ -886,23 +882,23 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface)
val |= MHWTRAP_MANUAL | MHWTRAP_P5_MAC_SEL | MHWTRAP_P5_DIS;
val &= ~MHWTRAP_P5_RGMII_MODE & ~MHWTRAP_PHY0_SEL;
- switch (priv->p5_intf_sel) {
- case P5_INTF_SEL_PHY_P0:
- /* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */
+ switch (priv->p5_mode) {
+ /* MUX_PHY_P0: P0 -> P5 -> SoC MAC */
+ case MUX_PHY_P0:
val |= MHWTRAP_PHY0_SEL;
fallthrough;
- case P5_INTF_SEL_PHY_P4:
- /* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */
+
+ /* MUX_PHY_P4: P4 -> P5 -> SoC MAC */
+ case MUX_PHY_P4:
val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS;
/* Setup the MAC by default for the cpu port */
mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);
break;
- case P5_INTF_SEL_GMAC5:
- /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */
- val &= ~MHWTRAP_P5_DIS;
- break;
+
+ /* GMAC5: P5 -> SoC MAC or external PHY */
default:
+ val &= ~MHWTRAP_P5_DIS;
break;
}
@@ -930,8 +926,8 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface)
mt7530_write(priv, MT7530_MHWTRAP, val);
- dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
- val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));
+ dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val,
+ mt7530_p5_mode_str(priv->p5_mode), phy_modes(interface));
mutex_unlock(&priv->reg_mutex);
}
@@ -2476,13 +2472,11 @@ mt7530_setup(struct dsa_switch *ds)
if (ret)
return ret;
- /* Setup port 5 */
- if (!dsa_is_unused_port(ds, 5)) {
- priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
- } else {
+ /* Check for PHY muxing on port 5 */
+ if (dsa_is_unused_port(ds, 5)) {
/* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY.
- * Set priv->p5_intf_sel to the appropriate value if PHY muxing
- * is detected.
+ * Set priv->p5_mode to the appropriate value if PHY muxing is
+ * detected.
*/
for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np,
@@ -2506,17 +2500,16 @@ mt7530_setup(struct dsa_switch *ds)
}
id = of_mdio_parse_addr(ds->dev, phy_node);
if (id == 0)
- priv->p5_intf_sel = P5_INTF_SEL_PHY_P0;
+ priv->p5_mode = MUX_PHY_P0;
if (id == 4)
- priv->p5_intf_sel = P5_INTF_SEL_PHY_P4;
+ priv->p5_mode = MUX_PHY_P4;
}
of_node_put(mac_np);
of_node_put(phy_node);
break;
}
- if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 ||
- priv->p5_intf_sel == P5_INTF_SEL_PHY_P4)
+ if (priv->p5_mode == MUX_PHY_P0 || priv->p5_mode == MUX_PHY_P4)
mt7530_setup_port5(ds, interface);
}
@@ -2654,9 +2647,6 @@ mt7531_setup(struct dsa_switch *ds)
MT7531_EXT_P_MDIO_12);
}
- if (!dsa_is_unused_port(ds, 5))
- priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
-
mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
MT7531_GPIO0_INTERRUPT);
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index 7d7abb67202f..c8155e32edbe 100644
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -708,12 +708,11 @@ struct mt7530_port {
struct phylink_pcs *sgmii_pcs;
};
-/* Port 5 interface select definitions */
-enum p5_interface_select {
- P5_DISABLED,
- P5_INTF_SEL_PHY_P0,
- P5_INTF_SEL_PHY_P4,
- P5_INTF_SEL_GMAC5,
+/* Port 5 mode definitions of the MT7530 switch */
+enum mt7530_p5_mode {
+ GMAC5,
+ MUX_PHY_P0,
+ MUX_PHY_P4,
};
struct mt7530_priv;
@@ -776,7 +775,7 @@ struct mt753x_info {
* @ports: Holding the state among ports
* @reg_mutex: The lock for protecting among process accessing
* registers
- * @p5_intf_sel: Holding the current port 5 interface select
+ * @p5_mode: Holding the current mode of port 5 of the MT7530 switch
* @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch
* has got SGMII
* @irq: IRQ number of the switch
@@ -798,7 +797,7 @@ struct mt7530_priv {
const struct mt753x_info *info;
unsigned int id;
bool mcm;
- enum p5_interface_select p5_intf_sel;
+ enum mt7530_p5_mode p5_mode;
bool p5_sgmii;
u8 mirror_rx;
u8 mirror_tx;
--
2.40.1
next prev parent reply other threads:[~2024-04-22 7:15 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 7:15 [PATCH net-next v2 00/15] MT7530 DSA Subdriver Improvements Act IV Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 01/15] net: dsa: mt7530: disable EEE abilities on failure on MT7531 and MT7988 Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 02/15] net: dsa: mt7530: refactor MT7530_PMCR_P() Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` Arınç ÜNAL via B4 Relay [this message]
2024-04-22 7:15 ` [PATCH net-next v2 04/15] net: dsa: mt7530: rename mt753x_bpdu_port_fw enum to mt753x_to_cpu_fw Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 05/15] net: dsa: mt7530: refactor MT7530_MFC and MT7531_CFC, add MT7531_QRY_FFP Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 06/15] net: dsa: mt7530: refactor MT7530_HWTRAP and MT7530_MHWTRAP Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 07/15] net: dsa: mt7530: move MT753X_MTRAP operations for MT7530 Arınç ÜNAL via B4 Relay
2024-04-27 2:24 ` Daniel Golle
2024-04-27 11:40 ` Arınç ÜNAL
2024-04-22 7:15 ` [PATCH net-next v2 08/15] net: dsa: mt7530: return mt7530_setup_mdio & mt7531_setup_common on error Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 09/15] net: dsa: mt7530: define MAC speed capabilities per switch model Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 10/15] net: dsa: mt7530: get rid of function sanity check Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 11/15] net: dsa: mt7530: refactor MT7530_PMEEECR_P() Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 12/15] net: dsa: mt7530: get rid of mac_port_validate member of mt753x_info Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 13/15] net: dsa: mt7530: use priv->ds->num_ports instead of MT7530_NUM_PORTS Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 14/15] net: dsa: mt7530: do not pass port variable to mt7531_rgmii_setup() Arınç ÜNAL via B4 Relay
2024-04-22 7:15 ` [PATCH net-next v2 15/15] net: dsa: mt7530: explain exposing MDIO bus of MT7531AE better Arınç ÜNAL via B4 Relay
2024-04-24 11:10 ` [PATCH net-next v2 00/15] MT7530 DSA Subdriver Improvements Act IV patchwork-bot+netdevbpf
2024-04-25 12:49 ` Daniel Golle
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240422-for-netnext-mt7530-improvements-4-v2-3-a75157ba76ad@arinc9.com \
--to=devnull+arinc.unal.arinc9.com@kernel.org \
--cc=andrew@lunn.ch \
--cc=angelogioacchino.delregno@collabora.com \
--cc=arinc.unal@arinc9.com \
--cc=bartel.eerdekens@constell8.be \
--cc=daniel@makrotopia.org \
--cc=davem@davemloft.net \
--cc=dqfext@gmail.com \
--cc=edumazet@google.com \
--cc=erkin.bozoglu@xeront.com \
--cc=f.fainelli@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux@armlinux.org.uk \
--cc=matthias.bgg@gmail.com \
--cc=mithat.guner@xeront.com \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
--cc=sean.wang@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).