From: Murali Karicheri <m-karicheri2@ti.com>
To: <broonie@kernel.org>, <linux-spi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] spi: davinci: change the lower limit of pre-scale divider to 1
Date: Wed, 10 Jun 2015 03:22:50 -0400 [thread overview]
Message-ID: <5577E5CA.80902@ti.com> (raw)
In-Reply-To: <1433920705-13068-1-git-send-email-m-karicheri2@ti.com>
On 06/10/2015 03:18 AM, Murali Karicheri wrote:
> SPI hardware spec for Keystone specifies a lower value of 0 for pre-scale
> divider that is used for generating spi clock which translates to a
> clock divider of 2. So fix the lower limit to allow using a higher SPI
> clock.
>
> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
> Acked-by: Sekhar Nori <nsekhar@ti.com>
> ---
> drivers/spi/spi-davinci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
> index 5e99106..987afeb 100644
> --- a/drivers/spi/spi-davinci.c
> +++ b/drivers/spi/spi-davinci.c
> @@ -265,7 +265,7 @@ static inline int davinci_spi_get_prescale(struct davinci_spi *dspi,
>
> ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz);
>
> - if (ret < 3 || ret > 256)
> + if (ret < 1 || ret > 256)
> return -EINVAL;
>
> return ret - 1;
>
Please ignore this as I messed up the PATCH prefix. I will re-send it
with v1 and some updates to the commit log.
--
Murali Karicheri
Linux Kernel, Keystone
prev parent reply other threads:[~2015-06-10 7:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-10 7:18 [PATCH 3/4] spi: davinci: change the lower limit of pre-scale divider to 1 Murali Karicheri
2015-06-10 7:22 ` Murali Karicheri [this message]
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