From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Alexandre Mergnat <amergnat@baylibre.com>, chunkuang.hu@kernel.org
Cc: robh@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, p.zabel@pengutronix.de, airlied@gmail.com,
daniel@ffwll.ch, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, matthias.bgg@gmail.com,
shawn.sung@mediatek.com, yu-chang.lee@mediatek.com,
ck.hu@mediatek.com, jitao.shi@mediatek.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, wenst@chromium.org,
kernel@collabora.com
Subject: Re: [PATCH v2 0/3] drm/mediatek: Add support for OF graphs
Date: Tue, 30 Apr 2024 13:33:15 +0200 [thread overview]
Message-ID: <608fdbde-ad06-45ec-9771-18aa9f002f2d@collabora.com> (raw)
In-Reply-To: <1fc23530-89ba-4e36-9e9a-a1289f56a9bc@baylibre.com>
Il 30/04/24 12:17, Alexandre Mergnat ha scritto:
> Hi Angelo,
>
> On 09/04/2024 14:02, AngeloGioacchino Del Regno wrote:
>> This series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
>> NIO-12L with both hardcoded paths, OF graph support and partially
>> hardcoded paths (meaning main display through OF graph and external
>> display hardcoded, because of OVL_ADAPTOR).
>
> Is that make sense for you to add the DTS changes of these boards into this serie ?
> I asked because, IMHO, that could help to understand the serie.
>
Yes and no... but I imagine that you're asking this because you're trying to
prepare something with a different SoC+board(s) combination :-)
In that case, I'm preventively sorry because what follows here is not 100%
perfectly tidy yet as I didn't mean to send the devicetree commits upstream
before this series got picked....
... but there you go - I'm sure that you won't mind and that the example will
be more than good enough for you.
Please note that one of the reasons why I didn't want to add this to the series
is that the following changes show only a mere 50% of the reasons why we want OF
graph support on mediatek-drm (but mainly, it's because I didn't have time to
actually rebase etc :-P )
Cheers!
Angelo
.../boot/dts/mediatek/mt8195-cherry.dtsi | 65 +++++++-
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 153 +++++++++++++++++-
.../dts/mediatek/mt8395-radxa-nio-12l.dts | 24 +++
3 files changed, 231 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 86d283ffe807..b05b6bbd457c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -267,12 +267,29 @@ &auxadc {
status = "okay";
};
+&dither0_out {
+ remote-endpoint = <&dsc0_in>;
+};
+
&dp_intf0 {
status = "okay";
- port {
- dp_intf0_out: endpoint {
- remote-endpoint = <&edp_in>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dp_intf0_in: endpoint {
+ remote-endpoint = <&merge0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dp_intf0_out: endpoint {
+ remote-endpoint = <&edp_in>;
+ };
};
};
};
@@ -287,6 +304,27 @@ dp_intf1_out: endpoint {
};
};
+&dsc0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsc0_in: endpoint {
+ remote-endpoint = <&dither0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsc0_out: endpoint {
+ remote-endpoint = <&merge0_in>;
+ };
+ };
+ };
+};
+
&edp_tx {
status = "okay";
@@ -481,6 +519,27 @@ pmic@34 {
};
};
+&merge0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ merge0_in: endpoint {
+ remote-endpoint = <&dsc0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ merge0_out: endpoint {
+ remote-endpoint = <&dp_intf0_in>;
+ };
+ };
+ };
+};
+
&mfg0 {
domain-supply = <&mt6315_7_vbuck1>;
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 88a0035a31a5..982572d7bfd8 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -3077,14 +3077,6 @@ vencsys_core1: clock-controller@1b000000 {
#clock-cells = <1>;
};
- vdosys0: syscon@1c01a000 {
- compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
- reg = <0 0x1c01a000 0 0x1000>;
- mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
- #clock-cells = <1>;
- };
-
-
jpgenc-master {
compatible = "mediatek,mt8195-jpgenc";
power-domains = <&spm MT8195_POWER_DOMAIN_VENC_CORE1>;
@@ -3143,6 +3135,38 @@ ovl0: ovl@1c000000 {
clocks = <&vdosys0 CLK_VDO0_DISP_OVL0>;
iommus = <&iommu_vdo M4U_PORT_L0_DISP_OVL0_RDMA0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x0000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ovl0_in: endpoint {
+ remote-endpoint = <&vdosys0_ep_main>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ovl0_out: endpoint {
+ remote-endpoint = <&rdma0_in>;
+ };
+ };
+ };
+ };
+
+ vdosys0: syscon@1c01a000 {
+ compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
+ reg = <0 0x1c01a000 0 0x1000>;
+ mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
+ #clock-cells = <1>;
+
+ port {
+ vdosys0_ep_main: endpoint {
+ remote-endpoint = <&ovl0_in>;
+ };
+ };
};
rdma0: rdma@1c002000 {
@@ -3153,6 +3177,25 @@ rdma0: rdma@1c002000 {
clocks = <&vdosys0 CLK_VDO0_DISP_RDMA0>;
iommus = <&iommu_vdo M4U_PORT_L0_DISP_RDMA0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x2000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ rdma0_in: endpoint {
+ remote-endpoint = <&ovl0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ rdma0_out: endpoint {
+ remote-endpoint = <&color0_in>;
+ };
+ };
+ };
};
color0: color@1c003000 {
@@ -3162,6 +3205,25 @@ color0: color@1c003000 {
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&vdosys0 CLK_VDO0_DISP_COLOR0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x3000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ color0_in: endpoint {
+ remote-endpoint = <&rdma0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ color0_out: endpoint {
+ remote-endpoint = <&ccorr0_in>;
+ };
+ };
+ };
};
ccorr0: ccorr@1c004000 {
@@ -3171,6 +3233,25 @@ ccorr0: ccorr@1c004000 {
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&vdosys0 CLK_VDO0_DISP_CCORR0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x4000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ccorr0_in: endpoint {
+ remote-endpoint = <&color0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ccorr0_out: endpoint {
+ remote-endpoint = <&aal0_in>;
+ };
+ };
+ };
};
aal0: aal@1c005000 {
@@ -3180,6 +3261,25 @@ aal0: aal@1c005000 {
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&vdosys0 CLK_VDO0_DISP_AAL0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x5000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ aal0_in: endpoint {
+ remote-endpoint = <&ccorr0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ aal0_out: endpoint {
+ remote-endpoint = <&gamma0_in>;
+ };
+ };
+ };
};
gamma0: gamma@1c006000 {
@@ -3189,6 +3289,25 @@ gamma0: gamma@1c006000 {
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&vdosys0 CLK_VDO0_DISP_GAMMA0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x6000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ gamma0_in: endpoint {
+ remote-endpoint = <&aal0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ gamma0_out: endpoint {
+ remote-endpoint = <&dither0_in>;
+ };
+ };
+ };
};
dither0: dither@1c007000 {
@@ -3198,6 +3317,24 @@ dither0: dither@1c007000 {
power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
clocks = <&vdosys0 CLK_VDO0_DISP_DITHER0>;
mediatek,gce-client-reg = <&gce0 SUBSYS_1c00XXXX 0x7000 0x1000>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dither0_in: endpoint {
+ remote-endpoint = <&gamma0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dither0_out: endpoint {
+ };
+ };
+ };
};
dsi0: dsi@1c008000 {
diff --git a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
index 7ab19b4e046f..b4a7dad2fea7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts
@@ -1063,6 +1063,10 @@ &disp_pwm0 {
status = "okay";
};
+&dither0_out {
+ remote-endpoint = <&dsi0_in>;
+};
+
&dsi0 {
status = "okay";
#address-cells = <1>;
@@ -1089,6 +1093,25 @@ dsi_panel_in: endpoint {
};
};
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi0_in: endpoint {
+ remote-endpoint = <&dither0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint {
+ remote-endpoint = <&dsi_panel_in>;
+ };
+ };
+ };
+/* old hardcoded dsi stuff, disappear!
ports {
port {
dsi_out: endpoint {
@@ -1096,6 +1119,7 @@ dsi_out: endpoint {
};
};
};
+*/
};
--
2.45.0
next prev parent reply other threads:[~2024-04-30 11:33 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-09 12:02 [PATCH v2 0/3] drm/mediatek: Add support for OF graphs AngeloGioacchino Del Regno
2024-04-09 12:02 ` [PATCH v2 1/3] dt-bindings: display: mediatek: Add OF graph support for board path AngeloGioacchino Del Regno
2024-04-09 15:20 ` Dmitry Baryshkov
2024-04-09 15:41 ` AngeloGioacchino Del Regno
2024-04-09 15:45 ` Dmitry Baryshkov
2024-04-19 7:40 ` AngeloGioacchino Del Regno
2024-04-10 19:03 ` Rob Herring
2024-04-19 7:44 ` AngeloGioacchino Del Regno
2024-04-09 12:02 ` [PATCH v2 2/3] dt-bindings: arm: mediatek: mmsys: " AngeloGioacchino Del Regno
2024-04-10 19:15 ` Rob Herring
2024-04-19 7:54 ` AngeloGioacchino Del Regno
2024-04-25 2:23 ` CK Hu (胡俊光)
2024-05-02 8:50 ` AngeloGioacchino Del Regno
2024-05-07 6:59 ` CK Hu (胡俊光)
2024-05-07 14:07 ` AngeloGioacchino Del Regno
2024-05-08 7:19 ` CK Hu (胡俊光)
2024-05-08 13:03 ` AngeloGioacchino Del Regno
2024-05-09 5:42 ` CK Hu (胡俊光)
2024-05-09 9:27 ` AngeloGioacchino Del Regno
2024-05-10 9:34 ` CK Hu (胡俊光)
2024-05-10 10:14 ` AngeloGioacchino Del Regno
2024-05-13 6:15 ` CK Hu (胡俊光)
2024-05-13 13:44 ` AngeloGioacchino Del Regno
2024-05-13 16:28 ` Conor Dooley
2024-05-16 7:27 ` AngeloGioacchino Del Regno
2024-04-09 12:02 ` [PATCH v2 3/3] drm/mediatek: Implement OF graphs support for display paths AngeloGioacchino Del Regno
2024-05-06 9:11 ` Michael Walle
2024-05-06 12:58 ` AngeloGioacchino Del Regno
2024-04-30 10:17 ` [PATCH v2 0/3] drm/mediatek: Add support for OF graphs Alexandre Mergnat
2024-04-30 11:33 ` AngeloGioacchino Del Regno [this message]
2024-05-02 16:53 ` Alexandre Mergnat
2024-05-14 9:46 ` Alexandre Mergnat
2024-05-14 12:00 ` AngeloGioacchino Del Regno
2024-05-06 10:02 ` Michael Walle
2024-05-06 10:56 ` AngeloGioacchino Del Regno
2024-05-06 11:22 ` AngeloGioacchino Del Regno
2024-05-06 13:17 ` Michael Walle
2024-05-06 14:18 ` AngeloGioacchino Del Regno
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