From: Tengfei Fan <quic_tengfan@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<keescook@chromium.org>, <tony.luck@intel.com>,
<gpiccoli@igalia.com>, <linux-arm-msm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-hardening@vger.kernel.org>, <kernel@quicinc.com>,
Fenglin Wu <quic_fenglinw@quicinc.com>
Subject: Re: [PATCH v7 3/4] arm64: dts: qcom: add base AIM300 dtsi
Date: Thu, 25 Apr 2024 11:21:52 +0800 [thread overview]
Message-ID: <7e2e252d-41ba-490c-aa7e-578b12c69049@quicinc.com> (raw)
In-Reply-To: <CAA8EJprceDUBtcrT0XLc7V9e0Joyw21YZD9=DONjTTfNM9chBw@mail.gmail.com>
On 4/25/2024 7:47 AM, Dmitry Baryshkov wrote:
> On Wed, 24 Apr 2024 at 05:46, Tengfei Fan <quic_tengfan@quicinc.com> wrote:
>>
>> AIM300 Series is a highly optimized family of modules designed to
>> support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC
>> chip etc.
>> Here is a diagram of AIM300 SoM:
>> +----------------------------------------+
>> |AIM300 SoM |
>> | |
>> | +-----+ |
>> | |--->| UFS | |
>> | | +-----+ |
>> | | |
>> | | |
>> 3.7v | +-----------------+ | +---------+ |
>> ---------->| PMIC |----->| QCS8550 | |
>> | +-----------------+ +---------+ |
>> | | |
>> | | |
>> | | +-----+ |
>> | |--->| ... | |
>> | +-----+ |
>> | |
>> +----------------------------------------+
>>
>> Co-developed-by: Fenglin Wu <quic_fenglinw@quicinc.com>
>> Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi | 403 +++++++++++++++++++
>> 1 file changed, 403 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi
>
>
>> +
>> +&pcie_1_phy_aux_clk {
>> + clock-frequency = <1000>;
>> +};
>
> Please rebase on top of
> https://lore.kernel.org/linux-arm-msm/20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v4-0-868b15a17a45@linaro.org/
Sure, I will reabse on the top of this patch series in the new version
patch series
>
>> +
>> +&pcie1 {
>> + perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
>> + wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
>
> Please add pinctrl configurations for pcie0 and pcie1
>
> With that fixed:
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
The pinctrl configurations of pcie0 and pcie1 will be moved to this dtsi
file from Carrier Board dts file.
>
>> +};
>> +
>>
>
> --
> With best wishes
> Dmitry
--
Thx and BRs,
Tengfei Fan
next prev parent reply other threads:[~2024-04-25 3:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-24 2:45 [PATCH v7 0/4] arm64: qcom: add AIM300 AIoT board support Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 1/4] dt-bindings: arm: qcom: Document QCS8550 SoC and the AIM300 AIoT board Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 2/4] arm64: dts: qcom: qcs8550: introduce qcs8550 dtsi Tengfei Fan
2024-04-24 2:45 ` [PATCH v7 3/4] arm64: dts: qcom: add base AIM300 dtsi Tengfei Fan
2024-04-24 23:47 ` Dmitry Baryshkov
2024-04-25 3:21 ` Tengfei Fan [this message]
2024-04-24 2:45 ` [PATCH v7 4/4] arm64: dts: qcom: aim300: add AIM300 AIoT Tengfei Fan
2024-04-24 23:50 ` Dmitry Baryshkov
2024-04-25 3:23 ` Tengfei Fan
2024-04-24 13:14 ` [PATCH v7 0/4] arm64: qcom: add AIM300 AIoT board support Rob Herring
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