From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: broonie@kernel.org, robh@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
unicorn_wang@outlook.com, inochiama@outlook.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, dlan@gentoo.org,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v1 1/2] dt-bindings: mtd: add sophgo spi-nor-controller
Date: Mon, 29 Apr 2024 14:41:18 +0800 [thread overview]
Message-ID: <CAJRtX8RztQfeoBhGjdAZZBW5h9PQT_pYhyKCRsbXwx83SbCExA@mail.gmail.com> (raw)
In-Reply-To: <40eee0ca-fb15-40c7-80be-a1198f37663d@linaro.org>
On Mon, Apr 29, 2024 at 2:18 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 27/04/2024 09:54, Jingbao Qiu wrote:
> > Add YAML bindings for cv1800 spi nor controller.
> >
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > ---
> > .../bindings/spi/sophgo,spi-cv1800-nor.yaml | 33 +++++++++++++++++++
> > 1 file changed, 33 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
> > new file mode 100644
> > index 000000000000..121a80fbf2d5
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/spi/sophgo,spi-cv1800-nor.yaml
>
> Filename like compatible.
>
I will fix it.
>
> > @@ -0,0 +1,33 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/spi/sophgo,spi-cv1800-nor.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: SPI controller for Sophgo RISC-V SoCs
> > +
> > +maintainers:
> > + - Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > +
> > +allOf:
> > + - $ref: /schemas/spi/spi-controller.yaml#
> > +
> > +properties:
> > + compatible:
> > + const: sophgo,cv1800b-nor
>
> A bit unusual that compatible has nothing in common with tile of the
> binding, thus the name of the hardware block.
I will modify the title.
>
> > +
> > + reg:
> > + maxItems: 1
>
> No clocks? No interrupts? This looks incomplete.
If necessary, I will add clocks and interrupts.
Thank you for your suggestion.
Best regards,
Jingbao Qiu
next prev parent reply other threads:[~2024-04-29 6:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-27 7:54 [PATCH v1 0/2] riscv: sophgo: add spi nor support for cv1800 series Jingbao Qiu
2024-04-27 7:54 ` [PATCH v1 1/2] dt-bindings: mtd: add sophgo spi-nor-controller Jingbao Qiu
2024-04-29 6:18 ` Krzysztof Kozlowski
2024-04-29 6:41 ` Jingbao Qiu [this message]
2024-04-29 6:43 ` Krzysztof Kozlowski
2024-04-29 9:25 ` Jingbao Qiu
2024-04-30 11:13 ` Michael Walle
2024-04-30 12:56 ` Jingbao Qiu
2024-04-27 7:54 ` [PATCH v1 2/2] spi: add support for sophgo spi-nor controller Jingbao Qiu
2024-04-30 10:31 ` kernel test robot
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