From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756150AbcBDL4E (ORCPT ); Thu, 4 Feb 2016 06:56:04 -0500 Received: from mail-yk0-f194.google.com ([209.85.160.194]:34316 "EHLO mail-yk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754377AbcBDL4C (ORCPT ); Thu, 4 Feb 2016 06:56:02 -0500 MIME-Version: 1.0 X-Originating-IP: [195.54.192.103] In-Reply-To: <42d5343703a9e67b5a2d94c8877bc0098448f71b.1454538980.git.christophe.leroy@c-s.fr> References: <42d5343703a9e67b5a2d94c8877bc0098448f71b.1454538980.git.christophe.leroy@c-s.fr> Date: Thu, 4 Feb 2016 14:37:32 +0300 Message-ID: Subject: Re: [PATCH v5 21/23] powerpc: Simplify test in __dma_sync() From: Denis Kirjanov To: Christophe Leroy Cc: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Scott Wood , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/4/16, Christophe Leroy wrote: > This simplification helps the compiler. We now have only one test > instead of two, so it reduces the number of branches. > > Signed-off-by: Christophe Leroy > --- > v2: new > v3: no change > v4: no change > v5: no change > > arch/powerpc/mm/dma-noncoherent.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/powerpc/mm/dma-noncoherent.c > b/arch/powerpc/mm/dma-noncoherent.c > index 169aba4..2dc74e5 100644 > --- a/arch/powerpc/mm/dma-noncoherent.c > +++ b/arch/powerpc/mm/dma-noncoherent.c > @@ -327,7 +327,7 @@ void __dma_sync(void *vaddr, size_t size, int direction) > * invalidate only when cache-line aligned otherwise there is > * the potential for discarding uncommitted data from the cache > */ > - if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1))) > + if ((start | end) & (L1_CACHE_BYTES - 1)) > flush_dcache_range(start, end); > else > invalidate_dcache_range(start, end); The previous version of address cache-line aligned check reads perfectly fine. What's the benefit of this micro optimization? > -- > 2.1.0 > > _______________________________________________ > Linuxppc-dev mailing list > Linuxppc-dev@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/linuxppc-dev