From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Wei Li <liwei391@huawei.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
linux-mips@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Felix Fietkau <nbd@nbd.name>
Subject: Re: [PATCH] MIPS: add support for buggy MT7621S core detection
Date: Wed, 7 Apr 2021 15:49:51 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.21.2104071545330.65251@angie.orcam.me.uk> (raw)
In-Reply-To: <CALCv0x0SwiOAWXk36vuFkspNSM16nS=wdMhm5ZNyOdFUia5zuw@mail.gmail.com>
On Mon, 5 Apr 2021, Ilya Lipnitskiy wrote:
> Thanks for the comments. Including asm/bugs.h in asm/mips-cps.h led to
> some circular dependencies when I tried it, but I will try again based
> on your feedback - indeed it would be much cleaner to have this logic
> in mips_cps_numcores. The only wrinkle is that mips_cps_numcores may
> return a different value on MT7621 after the cores have started due to
> CPULAUNCH flags changing, but nobody calls mips_cps_numcores later
> anyway, so it's a moot point today. I will clean up the change and
> resend.
Hmm, I don't know this system, but by the look of the code it queries
launch[2], which I gather refers to the VPE #0 of an inexistent core #1,
so why would the structure change given that there is no corresponding
silicon?
Maciej
next prev parent reply other threads:[~2021-04-07 13:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-03 6:19 [PATCH] MIPS: add support for buggy MT7621S core detection Ilya Lipnitskiy
2021-04-06 1:22 ` Maciej W. Rozycki
2021-04-06 1:54 ` Ilya Lipnitskiy
2021-04-07 13:49 ` Maciej W. Rozycki [this message]
2021-04-07 18:49 ` Ilya Lipnitskiy
2021-06-25 10:54 ` Strontium
2021-04-06 4:23 ` [PATCH v2] " Ilya Lipnitskiy
2021-04-07 13:52 ` Maciej W. Rozycki
2021-04-07 20:07 ` [PATCH v3] " Ilya Lipnitskiy
2021-04-12 15:03 ` Thomas Bogendoerfer
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