From: Lisa Robinson <lisa@bytefly.space>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: WANG Xuerui <kernel@xen0n.name>,
loongarch@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
Date: Wed, 15 Apr 2026 16:04:37 +0800 [thread overview]
Message-ID: <CA+=oZ7J+_WL6r5eovirkugAGqQULDsJU7pfuxgk1z7xvqT_fcA@mail.gmail.com> (raw)
In-Reply-To: <CAAhV-H4NnPTX+ov7NhwiTo7bqCBgFv-RvsodsZ_cc==N0Sd7UA@mail.gmail.com>
On Tue, Apr 14, 2026 at 9:02 PM Huacai Chen <chenhuacai@kernel.org> wrote:
>
> On Tue, Apr 14, 2026 at 4:20 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> >
> > On Sat, Apr 11, 2026 at 9:10 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> > >
> > > Applied, thanks.
> > I'm sorry, I reverted this patch because it breaks the partial copy
> > optimization in arch_dup_task_struct().
> Fixed as this:
> https://github.com/chenhuacai/linux/commit/c1365bc97d609438809d5d44d338adfc09767d6f
Thanks for catching and fixing this.
Lisa
>
> Huacai
>
> >
> > Huacai
> >
> > >
> > > Huacai
> > >
> > > On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
> > > >
> > > > Move fpr to the beginning of struct loongarch_fpu so it is naturally
> > > > aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> > > > switch performance.
> > > >
> > > > Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> > > > ---
> > > > arch/loongarch/include/asm/processor.h | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> > > > index c3bc44b5f5b3..ce8b953f8c79 100644
> > > > --- a/arch/loongarch/include/asm/processor.h
> > > > +++ b/arch/loongarch/include/asm/processor.h
> > > > @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> > > > BUILD_FPR_ACCESS(64)
> > > >
> > > > struct loongarch_fpu {
> > > > + union fpureg fpr[NUM_FPU_REGS];
> > > > uint64_t fcc; /* 8x8 */
> > > > uint32_t fcsr;
> > > > uint32_t ftop;
> > > > - union fpureg fpr[NUM_FPU_REGS];
> > > > };
> > > >
> > > > struct loongarch_lbt {
> > > > --
> > > > 2.53.0
> > > >
prev parent reply other threads:[~2026-04-15 8:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 9:48 [PATCH] LoongArch: Align FPU register state to 32 bytes Lisa Robinson
2026-04-11 13:10 ` Huacai Chen
2026-04-14 8:20 ` Huacai Chen
2026-04-14 13:02 ` Huacai Chen
2026-04-15 8:04 ` Lisa Robinson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CA+=oZ7J+_WL6r5eovirkugAGqQULDsJU7pfuxgk1z7xvqT_fcA@mail.gmail.com' \
--to=lisa@bytefly.space \
--cc=chenhuacai@kernel.org \
--cc=kernel@xen0n.name \
--cc=linux-kernel@vger.kernel.org \
--cc=loongarch@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).