From: wjjsn <wjjsn@qq.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
chenhuacai@kernel.org
Cc: kernel@xen0n.name, devicetree@vger.kernel.org,
loongarch@lists.linux.dev, linux-kernel@vger.kernel.org,
wjjsn <wjjsn@qq.com>
Subject: [PATCH v3 0/2] Add Loongson-2K0300 processor support
Date: Sun, 22 Mar 2026 14:02:44 +0800 [thread overview]
Message-ID: <tencent_5B265C60A4EE4E6FBD5AA4CD0096A95ECC0A@qq.com> (raw)
The first patch adds the necessary DT binding documentation,
and the second patch adds the DTS and DTSI files for the SoC
and the board.
Changes in v3:
- Corrected the compatible string in DT bindings from 'loongson,99pi'
to 'loongson,ls2k0300-ref' to match the board's formal name.
Changes in v2:
- Split DT bindings and DTS into separate patches to comply with
upstream requirements.
- Included the missing Documentation/devicetree/bindings/ modification.
Known issues:
1. The clk controller node is correctly defined, but some frequency
configurations rely on future driver-side fixes.
2. uart0 is currently placed under the root node as the 2K0300
manual lacks explicit documentation on the bus/interconnect
hierarchy (comparable to the bus@10000000 in other 2K SoCs).
wjjsn (2):
dt-bindings: loongarch: Add Loongson-2K0300
loongarch: boot: dts: Add Loongson-2K0300 support
.../bindings/loongarch/loongson.yaml | 4 +
arch/loongarch/boot/dts/Makefile | 2 +-
.../boot/dts/loongson-2k0300-ref.dts | 34 +++++++
arch/loongarch/boot/dts/loongson-2k0300.dtsi | 95 +++++++++++++++++++
4 files changed, 134 insertions(+), 1 deletion(-)
create mode 100644 arch/loongarch/boot/dts/loongson-2k0300-ref.dts
create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
--
2.43.0
reply other threads:[~2026-03-22 6:02 UTC|newest]
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