* [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd
@ 2015-09-14 9:26 Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 1/2] sd.h: Move sd.h to include/hw/sd/ Sai Pavan Boddu
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Sai Pavan Boddu @ 2015-09-14 9:26 UTC (permalink / raw
To: qemu-devel, stefanha, crosthwaitepeter, peter.maydell
Cc: Sai Pavan Boddu, edgari, alistai
Move sdhci.h splitting it into common and internal.
Create a new directory for sd in include/hw/.
Correct paths of sd.h in at every instance of #include.
Sai Pavan Boddu (2):
sd.h: Move sd.h to include/hw/sd/
sdhci: Split sdhci.h for public and internal device usage
hw/sd/milkymist-memcard.c | 2 +-
hw/sd/omap_mmc.c | 2 +-
hw/sd/pl181.c | 2 +-
hw/sd/pxa2xx_mmci.c | 2 +-
hw/sd/sd.c | 2 +-
hw/sd/sdhci.c | 1 -
hw/sd/sdhci.h | 67 +-------------------------------
hw/sd/ssi-sd.c | 2 +-
include/hw/{ => sd}/sd.h | 0
include/hw/sd/sdhci-common.h | 92 ++++++++++++++++++++++++++++++++++++++++++++
10 files changed, 100 insertions(+), 72 deletions(-)
rename include/hw/{ => sd}/sd.h (100%)
create mode 100644 include/hw/sd/sdhci-common.h
--
1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH V4 1/2] sd.h: Move sd.h to include/hw/sd/
2015-09-14 9:26 [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
@ 2015-09-14 9:26 ` Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage Sai Pavan Boddu
2015-09-21 8:48 ` [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
2 siblings, 0 replies; 6+ messages in thread
From: Sai Pavan Boddu @ 2015-09-14 9:26 UTC (permalink / raw
To: qemu-devel, stefanha, crosthwaitepeter, peter.maydell
Cc: Sai Pavan Boddu, edgari, alistai
Create a sd director under include/hw/ and move sd.h to same.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
---
Changes for V4:
Fix commit message.
Changes for V3:
None.
---
hw/sd/milkymist-memcard.c | 2 +-
hw/sd/omap_mmc.c | 2 +-
hw/sd/pl181.c | 2 +-
hw/sd/pxa2xx_mmci.c | 2 +-
hw/sd/sd.c | 2 +-
hw/sd/sdhci.h | 2 +-
hw/sd/ssi-sd.c | 2 +-
include/hw/{ => sd}/sd.h | 0
8 files changed, 7 insertions(+), 7 deletions(-)
rename include/hw/{ => sd}/sd.h (100%)
diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c
index 2209ef1..b430d56 100644
--- a/hw/sd/milkymist-memcard.c
+++ b/hw/sd/milkymist-memcard.c
@@ -28,7 +28,7 @@
#include "qemu/error-report.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
enum {
ENABLE_CMD_TX = (1<<0),
diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c
index 35d8033..5bc4719 100644
--- a/hw/sd/omap_mmc.c
+++ b/hw/sd/omap_mmc.c
@@ -18,7 +18,7 @@
*/
#include "hw/hw.h"
#include "hw/arm/omap.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
struct omap_mmc_s {
qemu_irq irq;
diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c
index 11fcd47..ddd9b6f 100644
--- a/hw/sd/pl181.c
+++ b/hw/sd/pl181.c
@@ -10,7 +10,7 @@
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "hw/sysbus.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
//#define DEBUG_PL181 1
diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c
index d1fe6d5..b217080 100644
--- a/hw/sd/pxa2xx_mmci.c
+++ b/hw/sd/pxa2xx_mmci.c
@@ -12,7 +12,7 @@
#include "hw/hw.h"
#include "hw/arm/pxa.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
#include "hw/qdev.h"
struct PXA2xxMMCIState {
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index a1ff465..0787e33 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -31,7 +31,7 @@
#include "hw/hw.h"
#include "sysemu/block-backend.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
#include "qemu/bitmap.h"
//#define DEBUG_SD 1
diff --git a/hw/sd/sdhci.h b/hw/sd/sdhci.h
index 3352d23..a45593f 100644
--- a/hw/sd/sdhci.h
+++ b/hw/sd/sdhci.h
@@ -28,7 +28,7 @@
#include "qemu-common.h"
#include "hw/pci/pci.h"
#include "hw/sysbus.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
/* R/W SDMA System Address register 0x0 */
#define SDHC_SYSAD 0x00
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index e4b2d4f..c49ff62 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -13,7 +13,7 @@
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "hw/ssi.h"
-#include "hw/sd.h"
+#include "hw/sd/sd.h"
//#define DEBUG_SSI_SD 1
diff --git a/include/hw/sd.h b/include/hw/sd/sd.h
similarity index 100%
rename from include/hw/sd.h
rename to include/hw/sd/sd.h
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage
2015-09-14 9:26 [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 1/2] sd.h: Move sd.h to include/hw/sd/ Sai Pavan Boddu
@ 2015-09-14 9:26 ` Sai Pavan Boddu
2015-09-21 14:31 ` Peter Crosthwaite
2015-09-21 8:48 ` [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
2 siblings, 1 reply; 6+ messages in thread
From: Sai Pavan Boddu @ 2015-09-14 9:26 UTC (permalink / raw
To: qemu-devel, stefanha, crosthwaitepeter, peter.maydell
Cc: Sai Pavan Boddu, edgari, alistai
Split sdhci.h into sdhci-common.h(pubilc Version in include/) and
sdhci.h(internal version in hw/sd) base on register declarations and
object declaration.
Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
---
Changes for V4:
Remain the name of internal version of sdchi.h as same. And change
Re-Adding qemu-common.h header.
the one which is in includes/ to sdhci-common.h
Changes for V2:
Create new area in includes for sd. And move sdhci.h to same.
Changes for V3:
Split the headers to public and common.
---
hw/sd/sdhci.c | 1 -
hw/sd/sdhci.h | 67 +-------------------------------
include/hw/sd/sdhci-common.h | 92 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 94 insertions(+), 66 deletions(-)
create mode 100644 include/hw/sd/sdhci-common.h
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e63367b..4860f41 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -28,7 +28,6 @@
#include "sysemu/dma.h"
#include "qemu/timer.h"
#include "qemu/bitops.h"
-
#include "sdhci.h"
/* host controller debug messages */
diff --git a/hw/sd/sdhci.h b/hw/sd/sdhci.h
index a45593f..667c60c 100644
--- a/hw/sd/sdhci.h
+++ b/hw/sd/sdhci.h
@@ -21,14 +21,10 @@
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-
#ifndef SDHCI_H
#define SDHCI_H
-#include "qemu-common.h"
-#include "hw/pci/pci.h"
-#include "hw/sysbus.h"
-#include "hw/sd/sd.h"
+#include "hw/sd/sdhci-common.h"
/* R/W SDMA System Address register 0x0 */
#define SDHC_SYSAD 0x00
@@ -231,65 +227,6 @@ enum {
sdhc_gap_write = 2 /* SDHC stopped at block gap during write operation */
};
-/* SD/MMC host controller state */
-typedef struct SDHCIState {
- union {
- PCIDevice pcidev;
- SysBusDevice busdev;
- };
- SDState *card;
- MemoryRegion iomem;
-
- QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
- QEMUTimer *transfer_timer;
- qemu_irq eject_cb;
- qemu_irq ro_cb;
- qemu_irq irq;
-
- uint32_t sdmasysad; /* SDMA System Address register */
- uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg */
- uint16_t blkcnt; /* Blocks count for current transfer */
- uint32_t argument; /* Command Argument Register */
- uint16_t trnmod; /* Transfer Mode Setting Register */
- uint16_t cmdreg; /* Command Register */
- uint32_t rspreg[4]; /* Response Registers 0-3 */
- uint32_t prnsts; /* Present State Register */
- uint8_t hostctl; /* Host Control Register */
- uint8_t pwrcon; /* Power control Register */
- uint8_t blkgap; /* Block Gap Control Register */
- uint8_t wakcon; /* WakeUp Control Register */
- uint16_t clkcon; /* Clock control Register */
- uint8_t timeoutcon; /* Timeout Control Register */
- uint8_t admaerr; /* ADMA Error Status Register */
- uint16_t norintsts; /* Normal Interrupt Status Register */
- uint16_t errintsts; /* Error Interrupt Status Register */
- uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
- uint16_t errintstsen; /* Error Interrupt Status Enable Register */
- uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
- uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
- uint16_t acmd12errsts; /* Auto CMD12 error status register */
- uint64_t admasysaddr; /* ADMA System Address Register */
-
- uint32_t capareg; /* Capabilities Register */
- uint32_t maxcurr; /* Maximum Current Capabilities Register */
- uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
- uint32_t buf_maxsz;
- uint16_t data_count; /* current element in FIFO buffer */
- uint8_t stopped_state;/* Current SDHC state */
- /* Buffer Data Port Register - virtual access point to R and W buffers */
- /* Software Reset Register - always reads as 0 */
- /* Force Event Auto CMD12 Error Interrupt Reg - write only */
- /* Force Event Error Interrupt Register- write only */
- /* RO Host Controller Version Register always reads as 0x2401 */
-} SDHCIState;
-
extern const VMStateDescription sdhci_vmstate;
-#define TYPE_PCI_SDHCI "sdhci-pci"
-#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
-
-#define TYPE_SYSBUS_SDHCI "generic-sdhci"
-#define SYSBUS_SDHCI(obj) \
- OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
-
-#endif /* SDHCI_H */
+#endif
diff --git a/include/hw/sd/sdhci-common.h b/include/hw/sd/sdhci-common.h
new file mode 100644
index 0000000..62c300b
--- /dev/null
+++ b/include/hw/sd/sdhci-common.h
@@ -0,0 +1,92 @@
+/*
+ * SD Association Host Standard Specification v2.0 controller emulation
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * Mitsyanko Igor <i.mitsyanko@samsung.com>
+ * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
+ *
+ * Based on MMC controller for Samsung S5PC1xx-based board emulation
+ * by Alexey Merkulov and Vladimir Monakhov.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU _General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef SDHCI_COMMON_H
+#define SDHCI_COMMON_H
+
+#include "qemu-common.h"
+#include "hw/pci/pci.h"
+#include "hw/sysbus.h"
+#include "hw/sd/sd.h"
+
+/* SD/MMC host controller state */
+typedef struct SDHCIState {
+ union {
+ PCIDevice pcidev;
+ SysBusDevice busdev;
+ };
+ SDState *card;
+ MemoryRegion iomem;
+
+ QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
+ QEMUTimer *transfer_timer;
+ qemu_irq eject_cb;
+ qemu_irq ro_cb;
+ qemu_irq irq;
+
+ uint32_t sdmasysad; /* SDMA System Address register */
+ uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg */
+ uint16_t blkcnt; /* Blocks count for current transfer */
+ uint32_t argument; /* Command Argument Register */
+ uint16_t trnmod; /* Transfer Mode Setting Register */
+ uint16_t cmdreg; /* Command Register */
+ uint32_t rspreg[4]; /* Response Registers 0-3 */
+ uint32_t prnsts; /* Present State Register */
+ uint8_t hostctl; /* Host Control Register */
+ uint8_t pwrcon; /* Power control Register */
+ uint8_t blkgap; /* Block Gap Control Register */
+ uint8_t wakcon; /* WakeUp Control Register */
+ uint16_t clkcon; /* Clock control Register */
+ uint8_t timeoutcon; /* Timeout Control Register */
+ uint8_t admaerr; /* ADMA Error Status Register */
+ uint16_t norintsts; /* Normal Interrupt Status Register */
+ uint16_t errintsts; /* Error Interrupt Status Register */
+ uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
+ uint16_t errintstsen; /* Error Interrupt Status Enable Register */
+ uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
+ uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
+ uint16_t acmd12errsts; /* Auto CMD12 error status register */
+ uint64_t admasysaddr; /* ADMA System Address Register */
+
+ uint32_t capareg; /* Capabilities Register */
+ uint32_t maxcurr; /* Maximum Current Capabilities Register */
+ uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
+ uint32_t buf_maxsz;
+ uint16_t data_count; /* current element in FIFO buffer */
+ uint8_t stopped_state;/* Current SDHC state */
+ /* Buffer Data Port Register - virtual access point to R and W buffers */
+ /* Software Reset Register - always reads as 0 */
+ /* Force Event Auto CMD12 Error Interrupt Reg - write only */
+ /* Force Event Error Interrupt Register- write only */
+ /* RO Host Controller Version Register always reads as 0x2401 */
+} SDHCIState;
+
+#define TYPE_PCI_SDHCI "sdhci-pci"
+#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
+
+#define TYPE_SYSBUS_SDHCI "generic-sdhci"
+#define SYSBUS_SDHCI(obj) \
+ OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
+
+#endif /* SDHCI_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd
2015-09-14 9:26 [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 1/2] sd.h: Move sd.h to include/hw/sd/ Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage Sai Pavan Boddu
@ 2015-09-21 8:48 ` Sai Pavan Boddu
2 siblings, 0 replies; 6+ messages in thread
From: Sai Pavan Boddu @ 2015-09-21 8:48 UTC (permalink / raw
To: Sai Pavan Boddu, qemu-devel@nongnu.org, stefanha@gmail.com,
crosthwaitepeter@gmail.com, peter.maydell@linaro.org
Cc: Edgar Iglesias, Alistair Francis
Ping
Thanks,
Sai Pavan
> -----Original Message-----
> From: Sai Pavan Boddu [mailto:sai.pavan.boddu@xilinx.com]
> Sent: Monday, September 14, 2015 2:57 PM
> To: qemu-devel@nongnu.org; stefanha@gmail.com;
> crosthwaitepeter@gmail.com; peter.maydell@linaro.org
> Cc: Alistair Francis; Edgar Iglesias; Sai Pavan Boddu
> Subject: [PATCH V4 0/2] Move sdhci.h to include/hw/sd
>
> Move sdhci.h splitting it into common and internal.
> Create a new directory for sd in include/hw/.
> Correct paths of sd.h in at every instance of #include.
>
> Sai Pavan Boddu (2):
> sd.h: Move sd.h to include/hw/sd/
> sdhci: Split sdhci.h for public and internal device usage
>
> hw/sd/milkymist-memcard.c | 2 +-
> hw/sd/omap_mmc.c | 2 +-
> hw/sd/pl181.c | 2 +-
> hw/sd/pxa2xx_mmci.c | 2 +-
> hw/sd/sd.c | 2 +-
> hw/sd/sdhci.c | 1 -
> hw/sd/sdhci.h | 67 +-------------------------------
> hw/sd/ssi-sd.c | 2 +-
> include/hw/{ => sd}/sd.h | 0
> include/hw/sd/sdhci-common.h | 92
> ++++++++++++++++++++++++++++++++++++++++++++
> 10 files changed, 100 insertions(+), 72 deletions(-)
> rename include/hw/{ => sd}/sd.h (100%)
> create mode 100644 include/hw/sd/sdhci-common.h
>
> --
> 1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage Sai Pavan Boddu
@ 2015-09-21 14:31 ` Peter Crosthwaite
2015-09-21 16:35 ` Sai Pavan Boddu
0 siblings, 1 reply; 6+ messages in thread
From: Peter Crosthwaite @ 2015-09-21 14:31 UTC (permalink / raw
To: Sai Pavan Boddu
Cc: Peter Maydell, Stefan Hajnoczi, qemu-devel@nongnu.org Developers,
Sai Pavan Boddu, Edgar Iglesias, Alistair Francis
On Mon, Sep 14, 2015 at 2:26 AM, Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
> Split sdhci.h into sdhci-common.h(pubilc Version in include/) and
> sdhci.h(internal version in hw/sd) base on register declarations and
> object declaration.
>
> Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
> ---
> Changes for V4:
> Remain the name of internal version of sdchi.h as same. And change
> Re-Adding qemu-common.h header.
> the one which is in includes/ to sdhci-common.h
> Changes for V2:
> Create new area in includes for sd. And move sdhci.h to same.
> Changes for V3:
> Split the headers to public and common.
> ---
> hw/sd/sdhci.c | 1 -
> hw/sd/sdhci.h | 67 +-------------------------------
> include/hw/sd/sdhci-common.h | 92 ++++++++++++++++++++++++++++++++++++++++++++
I think the split is good (and needed for SDHCI SoCification) but the
names are inconsistent. The public header should trump the private
when it comes to who gets the name "sdhci.h". So we should have
include/hw/sd/sdhci.h with the SoC embeddable and
hw/sd/sdhci-internal.h for the implementation private content. Check
target-arm/cpu-internal.h vs target-arm/cpu.h for a similar concept.
Regards,
Peter
> 3 files changed, 94 insertions(+), 66 deletions(-)
> create mode 100644 include/hw/sd/sdhci-common.h
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index e63367b..4860f41 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -28,7 +28,6 @@
> #include "sysemu/dma.h"
> #include "qemu/timer.h"
> #include "qemu/bitops.h"
> -
> #include "sdhci.h"
>
> /* host controller debug messages */
> diff --git a/hw/sd/sdhci.h b/hw/sd/sdhci.h
> index a45593f..667c60c 100644
> --- a/hw/sd/sdhci.h
> +++ b/hw/sd/sdhci.h
> @@ -21,14 +21,10 @@
> * You should have received a copy of the GNU General Public License along
> * with this program; if not, see <http://www.gnu.org/licenses/>.
> */
> -
> #ifndef SDHCI_H
> #define SDHCI_H
>
> -#include "qemu-common.h"
> -#include "hw/pci/pci.h"
> -#include "hw/sysbus.h"
> -#include "hw/sd/sd.h"
> +#include "hw/sd/sdhci-common.h"
>
> /* R/W SDMA System Address register 0x0 */
> #define SDHC_SYSAD 0x00
> @@ -231,65 +227,6 @@ enum {
> sdhc_gap_write = 2 /* SDHC stopped at block gap during write operation */
> };
>
> -/* SD/MMC host controller state */
> -typedef struct SDHCIState {
> - union {
> - PCIDevice pcidev;
> - SysBusDevice busdev;
> - };
> - SDState *card;
> - MemoryRegion iomem;
> -
> - QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
> - QEMUTimer *transfer_timer;
> - qemu_irq eject_cb;
> - qemu_irq ro_cb;
> - qemu_irq irq;
> -
> - uint32_t sdmasysad; /* SDMA System Address register */
> - uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg */
> - uint16_t blkcnt; /* Blocks count for current transfer */
> - uint32_t argument; /* Command Argument Register */
> - uint16_t trnmod; /* Transfer Mode Setting Register */
> - uint16_t cmdreg; /* Command Register */
> - uint32_t rspreg[4]; /* Response Registers 0-3 */
> - uint32_t prnsts; /* Present State Register */
> - uint8_t hostctl; /* Host Control Register */
> - uint8_t pwrcon; /* Power control Register */
> - uint8_t blkgap; /* Block Gap Control Register */
> - uint8_t wakcon; /* WakeUp Control Register */
> - uint16_t clkcon; /* Clock control Register */
> - uint8_t timeoutcon; /* Timeout Control Register */
> - uint8_t admaerr; /* ADMA Error Status Register */
> - uint16_t norintsts; /* Normal Interrupt Status Register */
> - uint16_t errintsts; /* Error Interrupt Status Register */
> - uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
> - uint16_t errintstsen; /* Error Interrupt Status Enable Register */
> - uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
> - uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
> - uint16_t acmd12errsts; /* Auto CMD12 error status register */
> - uint64_t admasysaddr; /* ADMA System Address Register */
> -
> - uint32_t capareg; /* Capabilities Register */
> - uint32_t maxcurr; /* Maximum Current Capabilities Register */
> - uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
> - uint32_t buf_maxsz;
> - uint16_t data_count; /* current element in FIFO buffer */
> - uint8_t stopped_state;/* Current SDHC state */
> - /* Buffer Data Port Register - virtual access point to R and W buffers */
> - /* Software Reset Register - always reads as 0 */
> - /* Force Event Auto CMD12 Error Interrupt Reg - write only */
> - /* Force Event Error Interrupt Register- write only */
> - /* RO Host Controller Version Register always reads as 0x2401 */
> -} SDHCIState;
> -
> extern const VMStateDescription sdhci_vmstate;
>
> -#define TYPE_PCI_SDHCI "sdhci-pci"
> -#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
> -
> -#define TYPE_SYSBUS_SDHCI "generic-sdhci"
> -#define SYSBUS_SDHCI(obj) \
> - OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
> -
> -#endif /* SDHCI_H */
> +#endif
> diff --git a/include/hw/sd/sdhci-common.h b/include/hw/sd/sdhci-common.h
> new file mode 100644
> index 0000000..62c300b
> --- /dev/null
> +++ b/include/hw/sd/sdhci-common.h
> @@ -0,0 +1,92 @@
> +/*
> + * SD Association Host Standard Specification v2.0 controller emulation
> + *
> + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> + * Mitsyanko Igor <i.mitsyanko@samsung.com>
> + * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
> + *
> + * Based on MMC controller for Samsung S5PC1xx-based board emulation
> + * by Alexey Merkulov and Vladimir Monakhov.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
> + * See the GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU _General Public License along
> + * with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef SDHCI_COMMON_H
> +#define SDHCI_COMMON_H
> +
> +#include "qemu-common.h"
> +#include "hw/pci/pci.h"
> +#include "hw/sysbus.h"
> +#include "hw/sd/sd.h"
> +
> +/* SD/MMC host controller state */
> +typedef struct SDHCIState {
> + union {
> + PCIDevice pcidev;
> + SysBusDevice busdev;
> + };
> + SDState *card;
> + MemoryRegion iomem;
> +
> + QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
> + QEMUTimer *transfer_timer;
> + qemu_irq eject_cb;
> + qemu_irq ro_cb;
> + qemu_irq irq;
> +
> + uint32_t sdmasysad; /* SDMA System Address register */
> + uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg */
> + uint16_t blkcnt; /* Blocks count for current transfer */
> + uint32_t argument; /* Command Argument Register */
> + uint16_t trnmod; /* Transfer Mode Setting Register */
> + uint16_t cmdreg; /* Command Register */
> + uint32_t rspreg[4]; /* Response Registers 0-3 */
> + uint32_t prnsts; /* Present State Register */
> + uint8_t hostctl; /* Host Control Register */
> + uint8_t pwrcon; /* Power control Register */
> + uint8_t blkgap; /* Block Gap Control Register */
> + uint8_t wakcon; /* WakeUp Control Register */
> + uint16_t clkcon; /* Clock control Register */
> + uint8_t timeoutcon; /* Timeout Control Register */
> + uint8_t admaerr; /* ADMA Error Status Register */
> + uint16_t norintsts; /* Normal Interrupt Status Register */
> + uint16_t errintsts; /* Error Interrupt Status Register */
> + uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
> + uint16_t errintstsen; /* Error Interrupt Status Enable Register */
> + uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
> + uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
> + uint16_t acmd12errsts; /* Auto CMD12 error status register */
> + uint64_t admasysaddr; /* ADMA System Address Register */
> +
> + uint32_t capareg; /* Capabilities Register */
> + uint32_t maxcurr; /* Maximum Current Capabilities Register */
> + uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
> + uint32_t buf_maxsz;
> + uint16_t data_count; /* current element in FIFO buffer */
> + uint8_t stopped_state;/* Current SDHC state */
> + /* Buffer Data Port Register - virtual access point to R and W buffers */
> + /* Software Reset Register - always reads as 0 */
> + /* Force Event Auto CMD12 Error Interrupt Reg - write only */
> + /* Force Event Error Interrupt Register- write only */
> + /* RO Host Controller Version Register always reads as 0x2401 */
> +} SDHCIState;
> +
> +#define TYPE_PCI_SDHCI "sdhci-pci"
> +#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
> +
> +#define TYPE_SYSBUS_SDHCI "generic-sdhci"
> +#define SYSBUS_SDHCI(obj) \
> + OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
> +
> +#endif /* SDHCI_H */
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage
2015-09-21 14:31 ` Peter Crosthwaite
@ 2015-09-21 16:35 ` Sai Pavan Boddu
0 siblings, 0 replies; 6+ messages in thread
From: Sai Pavan Boddu @ 2015-09-21 16:35 UTC (permalink / raw
To: Peter Crosthwaite
Cc: Stefan Hajnoczi, Edgar Iglesias, Alistair Francis,
qemu-devel@nongnu.org Developers, Peter Maydell
> -----Original Message-----
> From: Peter Crosthwaite [mailto:crosthwaitepeter@gmail.com]
> Sent: Monday, September 21, 2015 8:01 PM
> To: Sai Pavan Boddu
> Cc: qemu-devel@nongnu.org Developers; Stefan Hajnoczi; Peter Maydell;
> Alistair Francis; Edgar Iglesias; Sai Pavan Boddu
> Subject: Re: [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device
> usage
>
> On Mon, Sep 14, 2015 at 2:26 AM, Sai Pavan Boddu
> <sai.pavan.boddu@xilinx.com> wrote:
> > Split sdhci.h into sdhci-common.h(pubilc Version in include/) and
> > sdhci.h(internal version in hw/sd) base on register declarations and
> > object declaration.
> >
> > Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com>
> > ---
> > Changes for V4:
> > Remain the name of internal version of sdchi.h as same. And change
> > Re-Adding qemu-common.h header.
> > the one which is in includes/ to sdhci-common.h
> > Changes for V2:
> > Create new area in includes for sd. And move sdhci.h to same.
> > Changes for V3:
> > Split the headers to public and common.
> > ---
> > hw/sd/sdhci.c | 1 -
> > hw/sd/sdhci.h | 67 +-------------------------------
> > include/hw/sd/sdhci-common.h | 92
> ++++++++++++++++++++++++++++++++++++++++++++
>
> I think the split is good (and needed for SDHCI SoCification) but the
> names are inconsistent. The public header should trump the private
> when it comes to who gets the name "sdhci.h". So we should have
> include/hw/sd/sdhci.h with the SoC embeddable and
> hw/sd/sdhci-internal.h for the implementation private content. Check
> target-arm/cpu-internal.h vs target-arm/cpu.h for a similar concept.
[Sai Pavan ] This make sense, I will come up the same changes in V5
Thanks,
Sai Pavan
>
> Regards,
> Peter
>
> > 3 files changed, 94 insertions(+), 66 deletions(-)
> > create mode 100644 include/hw/sd/sdhci-common.h
> >
> > diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> > index e63367b..4860f41 100644
> > --- a/hw/sd/sdhci.c
> > +++ b/hw/sd/sdhci.c
> > @@ -28,7 +28,6 @@
> > #include "sysemu/dma.h"
> > #include "qemu/timer.h"
> > #include "qemu/bitops.h"
> > -
> > #include "sdhci.h"
> >
> > /* host controller debug messages */
> > diff --git a/hw/sd/sdhci.h b/hw/sd/sdhci.h
> > index a45593f..667c60c 100644
> > --- a/hw/sd/sdhci.h
> > +++ b/hw/sd/sdhci.h
> > @@ -21,14 +21,10 @@
> > * You should have received a copy of the GNU General Public License
> along
> > * with this program; if not, see <http://www.gnu.org/licenses/>.
> > */
> > -
> > #ifndef SDHCI_H
> > #define SDHCI_H
> >
> > -#include "qemu-common.h"
> > -#include "hw/pci/pci.h"
> > -#include "hw/sysbus.h"
> > -#include "hw/sd/sd.h"
> > +#include "hw/sd/sdhci-common.h"
> >
> > /* R/W SDMA System Address register 0x0 */
> > #define SDHC_SYSAD 0x00
> > @@ -231,65 +227,6 @@ enum {
> > sdhc_gap_write = 2 /* SDHC stopped at block gap during write
> operation */
> > };
> >
> > -/* SD/MMC host controller state */
> > -typedef struct SDHCIState {
> > - union {
> > - PCIDevice pcidev;
> > - SysBusDevice busdev;
> > - };
> > - SDState *card;
> > - MemoryRegion iomem;
> > -
> > - QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
> > - QEMUTimer *transfer_timer;
> > - qemu_irq eject_cb;
> > - qemu_irq ro_cb;
> > - qemu_irq irq;
> > -
> > - uint32_t sdmasysad; /* SDMA System Address register */
> > - uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg
> */
> > - uint16_t blkcnt; /* Blocks count for current transfer */
> > - uint32_t argument; /* Command Argument Register */
> > - uint16_t trnmod; /* Transfer Mode Setting Register */
> > - uint16_t cmdreg; /* Command Register */
> > - uint32_t rspreg[4]; /* Response Registers 0-3 */
> > - uint32_t prnsts; /* Present State Register */
> > - uint8_t hostctl; /* Host Control Register */
> > - uint8_t pwrcon; /* Power control Register */
> > - uint8_t blkgap; /* Block Gap Control Register */
> > - uint8_t wakcon; /* WakeUp Control Register */
> > - uint16_t clkcon; /* Clock control Register */
> > - uint8_t timeoutcon; /* Timeout Control Register */
> > - uint8_t admaerr; /* ADMA Error Status Register */
> > - uint16_t norintsts; /* Normal Interrupt Status Register */
> > - uint16_t errintsts; /* Error Interrupt Status Register */
> > - uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
> > - uint16_t errintstsen; /* Error Interrupt Status Enable Register */
> > - uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
> > - uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
> > - uint16_t acmd12errsts; /* Auto CMD12 error status register */
> > - uint64_t admasysaddr; /* ADMA System Address Register */
> > -
> > - uint32_t capareg; /* Capabilities Register */
> > - uint32_t maxcurr; /* Maximum Current Capabilities Register */
> > - uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
> > - uint32_t buf_maxsz;
> > - uint16_t data_count; /* current element in FIFO buffer */
> > - uint8_t stopped_state;/* Current SDHC state */
> > - /* Buffer Data Port Register - virtual access point to R and W buffers */
> > - /* Software Reset Register - always reads as 0 */
> > - /* Force Event Auto CMD12 Error Interrupt Reg - write only */
> > - /* Force Event Error Interrupt Register- write only */
> > - /* RO Host Controller Version Register always reads as 0x2401 */
> > -} SDHCIState;
> > -
> > extern const VMStateDescription sdhci_vmstate;
> >
> > -#define TYPE_PCI_SDHCI "sdhci-pci"
> > -#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj),
> TYPE_PCI_SDHCI)
> > -
> > -#define TYPE_SYSBUS_SDHCI "generic-sdhci"
> > -#define SYSBUS_SDHCI(obj) \
> > - OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
> > -
> > -#endif /* SDHCI_H */
> > +#endif
> > diff --git a/include/hw/sd/sdhci-common.h b/include/hw/sd/sdhci-
> common.h
> > new file mode 100644
> > index 0000000..62c300b
> > --- /dev/null
> > +++ b/include/hw/sd/sdhci-common.h
> > @@ -0,0 +1,92 @@
> > +/*
> > + * SD Association Host Standard Specification v2.0 controller emulation
> > + *
> > + * Copyright (c) 2011 Samsung Electronics Co., Ltd.
> > + * Mitsyanko Igor <i.mitsyanko@samsung.com>
> > + * Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
> > + *
> > + * Based on MMC controller for Samsung S5PC1xx-based board emulation
> > + * by Alexey Merkulov and Vladimir Monakhov.
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > + * Free Software Foundation; either version 2 of the License, or (at your
> > + * option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
> > + * See the GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU _General Public License
> along
> > + * with this program; if not, see <http://www.gnu.org/licenses/>.
> > + */
> > +
> > +#ifndef SDHCI_COMMON_H
> > +#define SDHCI_COMMON_H
> > +
> > +#include "qemu-common.h"
> > +#include "hw/pci/pci.h"
> > +#include "hw/sysbus.h"
> > +#include "hw/sd/sd.h"
> > +
> > +/* SD/MMC host controller state */
> > +typedef struct SDHCIState {
> > + union {
> > + PCIDevice pcidev;
> > + SysBusDevice busdev;
> > + };
> > + SDState *card;
> > + MemoryRegion iomem;
> > +
> > + QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
> > + QEMUTimer *transfer_timer;
> > + qemu_irq eject_cb;
> > + qemu_irq ro_cb;
> > + qemu_irq irq;
> > +
> > + uint32_t sdmasysad; /* SDMA System Address register */
> > + uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize Reg
> */
> > + uint16_t blkcnt; /* Blocks count for current transfer */
> > + uint32_t argument; /* Command Argument Register */
> > + uint16_t trnmod; /* Transfer Mode Setting Register */
> > + uint16_t cmdreg; /* Command Register */
> > + uint32_t rspreg[4]; /* Response Registers 0-3 */
> > + uint32_t prnsts; /* Present State Register */
> > + uint8_t hostctl; /* Host Control Register */
> > + uint8_t pwrcon; /* Power control Register */
> > + uint8_t blkgap; /* Block Gap Control Register */
> > + uint8_t wakcon; /* WakeUp Control Register */
> > + uint16_t clkcon; /* Clock control Register */
> > + uint8_t timeoutcon; /* Timeout Control Register */
> > + uint8_t admaerr; /* ADMA Error Status Register */
> > + uint16_t norintsts; /* Normal Interrupt Status Register */
> > + uint16_t errintsts; /* Error Interrupt Status Register */
> > + uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
> > + uint16_t errintstsen; /* Error Interrupt Status Enable Register */
> > + uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
> > + uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
> > + uint16_t acmd12errsts; /* Auto CMD12 error status register */
> > + uint64_t admasysaddr; /* ADMA System Address Register */
> > +
> > + uint32_t capareg; /* Capabilities Register */
> > + uint32_t maxcurr; /* Maximum Current Capabilities Register */
> > + uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
> > + uint32_t buf_maxsz;
> > + uint16_t data_count; /* current element in FIFO buffer */
> > + uint8_t stopped_state;/* Current SDHC state */
> > + /* Buffer Data Port Register - virtual access point to R and W buffers */
> > + /* Software Reset Register - always reads as 0 */
> > + /* Force Event Auto CMD12 Error Interrupt Reg - write only */
> > + /* Force Event Error Interrupt Register- write only */
> > + /* RO Host Controller Version Register always reads as 0x2401 */
> > +} SDHCIState;
> > +
> > +#define TYPE_PCI_SDHCI "sdhci-pci"
> > +#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj),
> TYPE_PCI_SDHCI)
> > +
> > +#define TYPE_SYSBUS_SDHCI "generic-sdhci"
> > +#define SYSBUS_SDHCI(obj) \
> > + OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
> > +
> > +#endif /* SDHCI_H */
> > --
> > 1.9.1
> >
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-09-21 16:35 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-09-14 9:26 [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 1/2] sd.h: Move sd.h to include/hw/sd/ Sai Pavan Boddu
2015-09-14 9:26 ` [Qemu-devel] [PATCH V4 2/2] sdhci: Split sdhci.h for public and internal device usage Sai Pavan Boddu
2015-09-21 14:31 ` Peter Crosthwaite
2015-09-21 16:35 ` Sai Pavan Boddu
2015-09-21 8:48 ` [Qemu-devel] [PATCH V4 0/2] Move sdhci.h to include/hw/sd Sai Pavan Boddu
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