From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 2/9] target/alpha: Hoist branch shift to initial decode
Date: Sat, 4 May 2024 08:39:19 -0700 [thread overview]
Message-ID: <20240504153926.357845-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240504153926.357845-1-richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240503072014.24751-3-philmd@linaro.org>
---
target/alpha/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index a97cd54f0c..52c2e6248b 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -432,7 +432,7 @@ static bool use_goto_tb(DisasContext *ctx, uint64_t dest)
static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp)
{
- uint64_t dest = ctx->base.pc_next + (disp << 2);
+ uint64_t dest = ctx->base.pc_next + disp;
if (ra != 31) {
tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next);
@@ -455,7 +455,7 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp)
static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
TCGv cmp, uint64_t imm, int32_t disp)
{
- uint64_t dest = ctx->base.pc_next + (disp << 2);
+ uint64_t dest = ctx->base.pc_next + disp;
TCGLabel *lab_true = gen_new_label();
if (use_goto_tb(ctx, dest)) {
@@ -1382,7 +1382,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
real_islit = islit = extract32(insn, 12, 1);
lit = extract32(insn, 13, 8);
- disp21 = sextract32(insn, 0, 21);
+ disp21 = sextract32(insn, 0, 21) * 4;
disp16 = sextract32(insn, 0, 16);
disp12 = sextract32(insn, 0, 12);
--
2.34.1
next prev parent reply other threads:[~2024-05-04 15:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-04 15:39 [PULL 0/9] target/alpha: Implement CF_PCREL Richard Henderson
2024-05-04 15:39 ` [PULL 1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU Richard Henderson
2024-05-04 15:39 ` Richard Henderson [this message]
2024-05-04 15:39 ` [PULL 3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value Richard Henderson
2024-05-04 15:39 ` [PULL 4/9] target/alpha: Inline DISAS_PC_UPDATED and return DISAS_NORETURN Richard Henderson
2024-05-04 15:39 ` [PULL 5/9] target/alpha: Return DISAS_NORETURN once Richard Henderson
2024-05-04 15:39 ` [PULL 6/9] target/alpha: Simplify gen_bcond_internal() Richard Henderson
2024-05-04 15:39 ` [PULL 7/9] target/alpha: Split out gen_goto_tb Richard Henderson
2024-05-04 15:39 ` [PULL 8/9] target/alpha: Split out gen_pc_disp Richard Henderson
2024-05-04 15:39 ` [PULL 9/9] target/alpha: Implement CF_PCREL Richard Henderson
2024-05-05 0:39 ` [PULL 0/9] " Richard Henderson
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