From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: qemu-devel@nongnu.org
Cc: "Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Song Gao" <gaosong@loongson.cn>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>
Subject: [PATCH 5/5] hw/mips/loongson3_virt: Wire up loongson_ipi device
Date: Wed, 08 May 2024 14:06:50 +0100 [thread overview]
Message-ID: <20240508-loongson3-ipi-v1-5-1a7b67704664@flygoat.com> (raw)
In-Reply-To: <20240508-loongson3-ipi-v1-0-1a7b67704664@flygoat.com>
Wire up loongson_ipi device for loongson3_virt machine, so we
can have SMP support for TCG backend as well.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
hw/mips/Kconfig | 1 +
hw/mips/loongson3_bootp.c | 2 --
hw/mips/loongson3_bootp.h | 3 +++
hw/mips/loongson3_virt.c | 39 +++++++++++++++++++++++++++++++++++++--
4 files changed, 41 insertions(+), 4 deletions(-)
diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig
index 5c83ef49cf6f..6f09fedc946e 100644
--- a/hw/mips/Kconfig
+++ b/hw/mips/Kconfig
@@ -57,6 +57,7 @@ config LOONGSON3V
imply USB_OHCI_PCI
select SERIAL
select GOLDFISH_RTC
+ select LOONGSON_IPI
select LOONGSON_LIOINTC
select PCI_EXPRESS_GENERIC_BRIDGE
select MSI_NONBROKEN
diff --git a/hw/mips/loongson3_bootp.c b/hw/mips/loongson3_bootp.c
index f99af229327a..474d3556b2e5 100644
--- a/hw/mips/loongson3_bootp.c
+++ b/hw/mips/loongson3_bootp.c
@@ -25,8 +25,6 @@
#include "hw/boards.h"
#include "hw/mips/loongson3_bootp.h"
-#define LOONGSON3_CORE_PER_NODE 4
-
static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq)
{
struct efi_cpuinfo_loongson *c = g_cpuinfo;
diff --git a/hw/mips/loongson3_bootp.h b/hw/mips/loongson3_bootp.h
index 1b0dd3b59171..9091265df7fc 100644
--- a/hw/mips/loongson3_bootp.h
+++ b/hw/mips/loongson3_bootp.h
@@ -200,6 +200,8 @@ struct boot_params {
struct efi_reset_system_t reset_system;
};
+#define LOONGSON3_CORE_PER_NODE 4
+
/* Overall MMIO & Memory layout */
enum {
VIRT_LOWMEM,
@@ -211,6 +213,7 @@ enum {
VIRT_BIOS_ROM,
VIRT_UART,
VIRT_LIOINTC,
+ VIRT_IPI,
VIRT_PCIE_MMIO,
VIRT_HIGHMEM
};
diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c
index b10a611a98f4..1052fb7d6747 100644
--- a/hw/mips/loongson3_virt.c
+++ b/hw/mips/loongson3_virt.c
@@ -36,6 +36,7 @@
#include "hw/mips/loongson3_bootp.h"
#include "hw/misc/unimp.h"
#include "hw/intc/i8259.h"
+#include "hw/intc/loongson_ipi.h"
#include "hw/loader.h"
#include "hw/isa/superio.h"
#include "hw/pci/msi.h"
@@ -74,6 +75,7 @@ const MemMapEntry virt_memmap[] = {
[VIRT_PCIE_ECAM] = { 0x1a000000, 0x2000000 },
[VIRT_BIOS_ROM] = { 0x1fc00000, 0x200000 },
[VIRT_UART] = { 0x1fe001e0, 0x8 },
+ [VIRT_IPI] = { 0x3ff01000, 0x400 },
[VIRT_LIOINTC] = { 0x3ff01400, 0x64 },
[VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 },
[VIRT_HIGHMEM] = { 0x80000000, 0x0 }, /* Variable */
@@ -466,6 +468,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
Clock *cpuclk;
CPUMIPSState *env;
DeviceState *liointc;
+ DeviceState *ipi = NULL;
char *filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *kernel_filename = machine->kernel_filename;
@@ -475,6 +478,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
MemoryRegion *iomem = g_new(MemoryRegion, 1);
+ MemoryRegion *iocsr = g_new(MemoryRegion, 1);
/* TODO: TCG will support all CPU types */
if (!kvm_enabled()) {
@@ -508,6 +512,19 @@ static void mips_loongson3_virt_init(MachineState *machine)
create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB);
create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB);
+ memory_region_init(iocsr, OBJECT(machine), "loongson3.iocsr", UINT32_MAX);
+
+ /* IPI controller is in kernel for KVM */
+ if (!kvm_enabled()) {
+ ipi = qdev_new(TYPE_LOONGSON_IPI);
+ qdev_prop_set_uint32(ipi, "num-cpu", machine->smp.cpus);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
+ memory_region_add_subregion(iocsr, SMP_IPI_MAILBOX,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0));
+ memory_region_add_subregion(iocsr, MAIL_SEND_ADDR,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
+ }
+
liointc = qdev_new("loongson.liointc");
sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal);
@@ -524,6 +541,8 @@ static void mips_loongson3_virt_init(MachineState *machine)
clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ);
for (i = 0; i < machine->smp.cpus; i++) {
+ int node = i / LOONGSON3_CORE_PER_NODE;
+ int core = i % LOONGSON3_CORE_PER_NODE;
int ip;
/* init CPUs */
@@ -534,12 +553,28 @@ static void mips_loongson3_virt_init(MachineState *machine)
cpu_mips_clock_init(cpu);
qemu_register_reset(main_cpu_reset, cpu);
- if (i >= 4) {
+ if (ipi) {
+ hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base;
+ base += core * 0x100;
+ qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]);
+ sysbus_mmio_map(SYS_BUS_DEVICE(ipi), i + 2, base);
+ }
+
+ if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
+ MemoryRegion *core_iocsr = g_new(MemoryRegion, 1);
+ g_autofree char *name = g_strdup_printf("loongson3.core%d_iocsr", i);
+ memory_region_init_alias(core_iocsr, OBJECT(machine), name,
+ iocsr, 0, UINT32_MAX);
+ memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr,
+ 0, core_iocsr);
+ }
+
+ if (node > 0) {
continue; /* Only node-0 can be connected to LIOINTC */
}
for (ip = 0; ip < 4 ; ip++) {
- int pin = i * 4 + ip;
+ int pin = core * LOONGSON3_CORE_PER_NODE + ip;
sysbus_connect_irq(SYS_BUS_DEVICE(liointc),
pin, cpu->env.irq[ip + 2]);
}
--
2.34.1
next prev parent reply other threads:[~2024-05-08 13:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 13:06 [PATCH 0/5] hw/mips/loongson3_virt: Implement IPI support Jiaxun Yang
2024-05-08 13:06 ` [PATCH 1/5] hw/intc/loongarch_ipi: Remove pointless MAX_CPU check Jiaxun Yang
2024-05-08 16:22 ` Philippe Mathieu-Daudé
2024-05-08 13:06 ` [PATCH 2/5] hw/intc/loongarch_ipi: Rename as loongson_ipi Jiaxun Yang
2024-05-08 16:24 ` Philippe Mathieu-Daudé
2024-05-08 13:06 ` [PATCH 3/5] hw/intc/loongson_ipi: Implement IOCSR address space for MIPS Jiaxun Yang
2024-05-08 16:21 ` Philippe Mathieu-Daudé
2024-05-08 13:06 ` [PATCH 4/5] hw/intc/loongson_ipi: Provide per core MMIO address spaces Jiaxun Yang
2024-05-08 13:06 ` Jiaxun Yang [this message]
2024-05-08 21:41 ` [PATCH 0/5] hw/mips/loongson3_virt: Implement IPI support Philippe Mathieu-Daudé
2024-05-16 10:53 ` Jiaxun Yang
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