From: Peter Maydell <peter.maydell@linaro.org>
To: Zenghui Yu <zenghui.yu@linux.dev>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, agraf@csgraf.de,
wanghaibin.wang@huawei.com
Subject: Re: [PATCH] hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers
Date: Tue, 7 May 2024 10:43:07 +0100 [thread overview]
Message-ID: <CAFEAcA9Jh9udZEa0ebzO--V+K9inA49TWf9jCv=Kn7RtMqhpZQ@mail.gmail.com> (raw)
In-Reply-To: <20240503153453.54389-1-zenghui.yu@linux.dev>
On Fri, 3 May 2024 at 16:35, Zenghui Yu <zenghui.yu@linux.dev> wrote:
>
> We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
> we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
> wrong key.
>
> Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
> guest can properly detect FEAT_SSBS2 on my M1 HW.
>
> All DBG{B,W}{V,C}R_EL1 registers are also wrongly encoded with op0 == 14.
> It happens to work because HVF_SYSREG(CRn, CRm, 14, op1, op2) equals to
> HVF_SYSREG(CRn, CRm, 2, op1, op2), by definition. But we shouldn't rely on
> it.
>
> Fixes: a1477da3ddeb ("hvf: Add Apple Silicon support")
> Signed-off-by: Zenghui Yu <zenghui.yu@linux.dev>
> ---
Applied to target-arm.next, thanks. I threw in a cc:stable tag,
though it doesn't sound like the consequences of the bug are very
significant.
-- PMM
prev parent reply other threads:[~2024-05-07 9:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-03 15:34 [PATCH] hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers Zenghui Yu
2024-05-05 13:18 ` Alexander Graf
2024-05-05 14:31 ` Zenghui Yu
2024-05-05 13:38 ` Marcin Juszkiewicz
2024-05-07 9:43 ` Peter Maydell [this message]
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