From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 6/9] target/alpha: Simplify gen_bcond_internal()
Date: Sat, 4 May 2024 07:40:04 -0700 [thread overview]
Message-ID: <e044216b-8191-4387-b8dd-8079df88c02d@linaro.org> (raw)
In-Reply-To: <20240503072014.24751-7-philmd@linaro.org>
On 5/3/24 00:20, Philippe Mathieu-Daudé wrote:
> Richard Henderson explained on IRC:
>
> bcond_internal() used to insist that both branch
> destination and branch fallthrough are use_goto_tb;
> if not, we'd use movcond to compute an indirect jump.
> But it's perfectly fine for e.g. the branch fallthrough
> to use_goto_tb, and the branch destination to use
> an indirect branch.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20240424234436.995410-4-richard.henderson@linaro.org>
> [PMD: Split bigger patch, part 4/5]
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/alpha/translate.c | 17 +++++++----------
> 1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/target/alpha/translate.c b/target/alpha/translate.c
> index 41151f002e..079bd5d3fd 100644
> --- a/target/alpha/translate.c
> +++ b/target/alpha/translate.c
> @@ -461,23 +461,20 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
> uint64_t dest = ctx->base.pc_next + disp;
> TCGLabel *lab_true = gen_new_label();
>
> - if (use_goto_tb(ctx, dest)) {
> - tcg_gen_brcondi_i64(cond, cmp, imm, lab_true);
> -
> + tcg_gen_brcondi_i64(cond, cmp, imm, lab_true);
> + if (use_goto_tb(ctx, ctx->base.pc_next)) {
> tcg_gen_goto_tb(0);
> tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next);
> tcg_gen_exit_tb(ctx->base.tb, 0);
> -
> - gen_set_label(lab_true);
> + }
> + /* FALLTHRU */
fall through does not work.
> + gen_set_label(lab_true);
> + if (use_goto_tb(ctx, dest)) {
> tcg_gen_goto_tb(1);
> tcg_gen_movi_i64(cpu_pc, dest);
> tcg_gen_exit_tb(ctx->base.tb, 1);
> } else {
> - TCGv_i64 i = tcg_constant_i64(imm);
> - TCGv_i64 d = tcg_constant_i64(dest);
> - TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next);
> -
> - tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p);
> + tcg_gen_movi_i64(cpu_pc, dest);
> tcg_gen_lookup_and_goto_ptr();
> }
Need the whole else replicated above.
r~
next prev parent reply other threads:[~2024-05-04 14:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-03 7:20 [PATCH v2 0/9] target/alpha: Implement CF_PCREL Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 2/9] target/alpha: Hoist branch shift to initial decode Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 4/9] target/alpha: Inline DISAS_PC_UPDATED and return DISAS_NORETURN Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 5/9] target/alpha: Return DISAS_NORETURN once Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 6/9] target/alpha: Simplify gen_bcond_internal() Philippe Mathieu-Daudé
2024-05-04 14:40 ` Richard Henderson [this message]
2024-05-03 7:20 ` [PATCH v2 7/9] target/alpha: Split out gen_goto_tb Philippe Mathieu-Daudé
2024-05-03 7:21 ` Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 8/9] target/alpha: Split out gen_pc_disp Philippe Mathieu-Daudé
2024-05-03 7:20 ` [PATCH v2 9/9] target/alpha: Implement CF_PCREL Philippe Mathieu-Daudé
2024-05-03 7:25 ` Philippe Mathieu-Daudé
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