* [PATCH] spi: fix xilinx-spi lockup when fifo-size undefined in dtree
@ 2021-07-27 13:14 Pauli Oikkonen
0 siblings, 0 replies; only message in thread
From: Pauli Oikkonen @ 2021-07-27 13:14 UTC (permalink / raw
To: u-boot@lists.denx.de; +Cc: jteki@openedev.com
If fifo_depth is 0, the driver will lock up.
If fifo-size is not defined in device tree, the driver would use 0 as
a default value. This however will cause an infinite loop and a lockup
in any read or write. Use 1 as a default FIFO size instead, no FIFO
should be zero-length anyway.
Signed-off-by: Pauli Oikkonen <pauli.oikkonen@wapice.com>
CC: Jagan Teki <jteki@openedev.com>
---
drivers/spi/xilinx_spi.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index b892cdae9b..da0f8b3bb4 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -110,12 +110,17 @@ struct xilinx_spi_priv {
static int xilinx_spi_probe(struct udevice *bus)
{
+ int success;
struct xilinx_spi_priv *priv = dev_get_priv(bus);
struct xilinx_spi_regs *regs = priv->regs;
priv->regs = (struct xilinx_spi_regs *)dev_read_addr(bus);
- priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
+ success = dev_read_u32(bus, "fifo-size", &priv->fifo_depth);
+ if (success != 0) {
+ debug("%s: no fifo-size defined in dtree, using 1\n", __func__);
+ priv->fifo_depth = 1;
+ }
writel(SPISSR_RESET_VALUE, ®s->srr);
--
2.25.1
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