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From: Zayd Qumsieh <zayd_qumsieh@apple.com>
To: marcan@marcan.st
Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
	mark.rutland@arm.com, zayd_qumsieh@apple.com,
	ih_justin@apple.com, Houdek.Ryan@fex-emu.org, broonie@kernel.org,
	ardb@kernel.org, mjguzik@gmail.com, anshuman.khandual@arm.com,
	oliver.upton@linux.dev, miguel.luis@oracle.com,
	joey.gouly@arm.com, cpaasch@apple.com, keescook@chromium.org,
	samitolvanen@google.com, bhe@redhat.com, j.granados@samsung.com,
	dawei.li@shingroup.cn, akpm@linux-foundation.org,
	revest@chromium.org, david@redhat.com, shr@devkernel.io,
	andy.chiu@sifive.com, josh@joshtriplett.org, oleg@redhat.com,
	deller@gmx.de, zev@bewilderbeest.net, omosnace@redhat.com,
	ojeda@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, asahi@lists.linux.dev
Subject: Re: [PATCH 0/4] arm64: Support the TSO memory model
Date: Mon, 15 Apr 2024 19:11:00 -0700	[thread overview]
Message-ID: <20240416021100.87652-1-zayd_qumsieh@apple.com> (raw)
In-Reply-To: Hector Martin <20240411-tso-v1-0-754f11abfbff@marcan.st>

The patch looks great! :) I have one minor suggestion, though:

>static __always_inline bool system_has_actlr_state(void)
>{
>	return IS_ENABLED(CONFIG_ARM64_ACTLR_STATE) &&
>		alternative_has_cap_unlikely(ARM64_HAS_TSO_APPLE);
>}

ACTLR_EL1.TSO is not exposed for writing on Virtual Machines on all
versions of MacOS. However, AIDR_EL1 may still advertise TSO, whether
or not ACTLR_EL1.TSO is writable. Could you modify the patch such that
we check the writability of ACTLR_EL1.TSO in system_has_actlr_state
(or once on startup, and cache it, since reading from AIDR_EL1 causes
a trap to Hypervisor.fwk)?

Thanks,
Zayd

WARNING: multiple messages have this Message-ID (diff)
From: Zayd Qumsieh <zayd_qumsieh@apple.com>
To: marcan@marcan.st
Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
	mark.rutland@arm.com, zayd_qumsieh@apple.com,
	ih_justin@apple.com, Houdek.Ryan@fex-emu.org, broonie@kernel.org,
	ardb@kernel.org, mjguzik@gmail.com, anshuman.khandual@arm.com,
	oliver.upton@linux.dev, miguel.luis@oracle.com,
	joey.gouly@arm.com, cpaasch@apple.com, keescook@chromium.org,
	samitolvanen@google.com, bhe@redhat.com, j.granados@samsung.com,
	dawei.li@shingroup.cn, akpm@linux-foundation.org,
	revest@chromium.org, david@redhat.com, shr@devkernel.io,
	andy.chiu@sifive.com, josh@joshtriplett.org, oleg@redhat.com,
	deller@gmx.de, zev@bewilderbeest.net, omosnace@redhat.com,
	ojeda@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, asahi@lists.linux.dev
Subject: Re: [PATCH 0/4] arm64: Support the TSO memory model
Date: Mon, 15 Apr 2024 19:11:00 -0700	[thread overview]
Message-ID: <20240416021100.87652-1-zayd_qumsieh@apple.com> (raw)
In-Reply-To: Hector Martin <20240411-tso-v1-0-754f11abfbff@marcan.st>

The patch looks great! :) I have one minor suggestion, though:

>static __always_inline bool system_has_actlr_state(void)
>{
>	return IS_ENABLED(CONFIG_ARM64_ACTLR_STATE) &&
>		alternative_has_cap_unlikely(ARM64_HAS_TSO_APPLE);
>}

ACTLR_EL1.TSO is not exposed for writing on Virtual Machines on all
versions of MacOS. However, AIDR_EL1 may still advertise TSO, whether
or not ACTLR_EL1.TSO is writable. Could you modify the patch such that
we check the writability of ACTLR_EL1.TSO in system_has_actlr_state
(or once on startup, and cache it, since reading from AIDR_EL1 causes
a trap to Hypervisor.fwk)?

Thanks,
Zayd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2024-04-16  2:11 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-11  0:51 [PATCH 0/4] arm64: Support the TSO memory model Hector Martin
2024-04-11  0:51 ` Hector Martin
2024-04-11  0:51 ` [PATCH 1/4] prctl: Introduce PR_{SET,GET}_MEM_MODEL Hector Martin
2024-04-11  0:51   ` Hector Martin
2024-04-11  0:51 ` [PATCH 2/4] arm64: Implement PR_{GET,SET}_MEM_MODEL for always-TSO CPUs Hector Martin
2024-04-11  0:51   ` Hector Martin
2024-04-11  0:51 ` [PATCH 3/4] arm64: Introduce scaffolding to add ACTLR_EL1 to thread state Hector Martin
2024-04-11  0:51   ` Hector Martin
2024-04-11  0:51 ` [PATCH 4/4] arm64: Implement Apple IMPDEF TSO memory model control Hector Martin
2024-04-11  0:51   ` Hector Martin
2024-04-11  1:37 ` [PATCH 0/4] arm64: Support the TSO memory model Neal Gompa
2024-04-11  1:37   ` Neal Gompa
2024-04-11 13:28 ` Will Deacon
2024-04-11 13:28   ` Will Deacon
2024-04-11 14:19   ` Hector Martin
2024-04-11 14:19     ` Hector Martin
2024-04-11 18:43     ` Hector Martin
2024-04-11 18:43       ` Hector Martin
2024-04-16  2:22       ` Zayd Qumsieh
2024-04-16  2:22         ` Zayd Qumsieh
2024-04-19 16:58         ` Will Deacon
2024-04-19 16:58           ` Will Deacon
2024-04-19 18:05           ` Catalin Marinas
2024-04-19 18:05             ` Catalin Marinas
2024-04-19 16:58     ` Will Deacon
2024-04-19 16:58       ` Will Deacon
2024-04-20 11:37       ` Marc Zyngier
2024-04-20 11:37         ` Marc Zyngier
2024-05-02  0:10         ` Zayd Qumsieh
2024-05-02  0:10           ` Zayd Qumsieh
2024-05-02 13:25           ` Marc Zyngier
2024-05-02 13:25             ` Marc Zyngier
2024-05-06  8:20             ` Jonas Oberhauser
2024-05-06  8:20               ` Jonas Oberhauser
2024-04-20 12:13       ` Eric Curtin
2024-04-20 12:13         ` Eric Curtin
2024-04-20 12:15         ` Eric Curtin
2024-04-20 12:15           ` Eric Curtin
2024-05-06 11:21         ` Sergio Lopez Pascual
2024-05-06 11:21           ` Sergio Lopez Pascual
2024-05-06 16:12           ` Marc Zyngier
2024-05-06 16:12             ` Marc Zyngier
2024-05-06 16:20             ` Eric Curtin
2024-05-06 16:20               ` Eric Curtin
2024-05-06 22:04             ` Sergio Lopez Pascual
2024-05-06 22:04               ` Sergio Lopez Pascual
2024-05-02  0:16   ` Zayd Qumsieh
2024-05-02  0:16     ` Zayd Qumsieh
2024-05-07 10:24   ` Alex Bennée
2024-05-07 10:24     ` Alex Bennée
2024-05-07 14:52     ` Ard Biesheuvel
2024-05-07 14:52       ` Ard Biesheuvel
2024-05-09 11:13       ` Catalin Marinas
2024-05-09 11:13         ` Catalin Marinas
2024-05-09 12:31         ` Neal Gompa
2024-05-09 12:31           ` Neal Gompa
2024-05-09 12:56           ` Catalin Marinas
2024-05-09 12:56             ` Catalin Marinas
2024-04-16  2:11 ` Zayd Qumsieh [this message]
2024-04-16  2:11   ` Zayd Qumsieh

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