From: Drew Fustini <dfustini@tenstorrent.com> To: Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>, Yangtao Li <frank.li@vivo.com>, Thomas Bonnefille <thomas.bonnefille@bootlin.com>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Drew Fustini <dfustini@tenstorrent.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFC v2 4/4] riscv: dts: thead: Add clock to TH1520 mmc controllers Date: Fri, 26 Apr 2024 17:10:37 -0700 [thread overview] Message-ID: <20240426-th1520-clk-v2-v2-4-96b829e6fcee@tenstorrent.com> (raw) In-Reply-To: <20240426-th1520-clk-v2-v2-0-96b829e6fcee@tenstorrent.com> Change the clock property in the T-Head TH1520 mmc controller nodes to a real clock provided by the AP_SUBSYS clock driver. Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> --- arch/riscv/boot/dts/thead/th1520.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 6285cdf91bd6..a6f51ec9fb55 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -324,7 +324,7 @@ emmc: mmc@ffe7080000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe7080000 0x0 0x10000>; interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; @@ -333,7 +333,7 @@ sdio0: mmc@ffe7090000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe7090000 0x0 0x10000>; interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; @@ -342,7 +342,7 @@ sdio1: mmc@ffe70a0000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe70a0000 0x0 0x10000>; interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <dfustini@tenstorrent.com> To: Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>, Yangtao Li <frank.li@vivo.com>, Thomas Bonnefille <thomas.bonnefille@bootlin.com>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Drew Fustini <dfustini@tenstorrent.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH RFC v2 4/4] riscv: dts: thead: Add clock to TH1520 mmc controllers Date: Fri, 26 Apr 2024 17:10:37 -0700 [thread overview] Message-ID: <20240426-th1520-clk-v2-v2-4-96b829e6fcee@tenstorrent.com> (raw) In-Reply-To: <20240426-th1520-clk-v2-v2-0-96b829e6fcee@tenstorrent.com> Change the clock property in the T-Head TH1520 mmc controller nodes to a real clock provided by the AP_SUBSYS clock driver. Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> --- arch/riscv/boot/dts/thead/th1520.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 6285cdf91bd6..a6f51ec9fb55 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -324,7 +324,7 @@ emmc: mmc@ffe7080000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe7080000 0x0 0x10000>; interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; @@ -333,7 +333,7 @@ sdio0: mmc@ffe7090000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe7090000 0x0 0x10000>; interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; @@ -342,7 +342,7 @@ sdio1: mmc@ffe70a0000 { compatible = "thead,th1520-dwcmshc"; reg = <0xff 0xe70a0000 0x0 0x10000>; interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sdhci_clk>; + clocks = <&clk CLK_EMMC_SDIO>; clock-names = "core"; status = "disabled"; }; -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-04-27 0:10 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-27 0:10 [PATCH RFC v2 0/4] clk: thead: Add support for TH1520 AP_SUBSYS clock controller Drew Fustini 2024-04-27 0:10 ` Drew Fustini 2024-04-27 0:10 ` [PATCH RFC v2 1/4] dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller Drew Fustini 2024-04-27 0:10 ` Drew Fustini 2024-04-29 5:10 ` Krzysztof Kozlowski 2024-04-29 5:10 ` Krzysztof Kozlowski 2024-04-27 0:10 ` [PATCH RFC v2 2/4] clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks Drew Fustini 2024-04-27 0:10 ` Drew Fustini 2024-05-02 7:47 ` Thomas Bonnefille 2024-05-02 7:47 ` Thomas Bonnefille 2024-04-27 0:10 ` [PATCH RFC v2 3/4] riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller Drew Fustini 2024-04-27 0:10 ` Drew Fustini 2024-04-27 0:10 ` Drew Fustini [this message] 2024-04-27 0:10 ` [PATCH RFC v2 4/4] riscv: dts: thead: Add clock to TH1520 mmc controllers Drew Fustini 2024-05-02 7:47 ` Thomas Bonnefille 2024-05-02 7:47 ` Thomas Bonnefille 2024-05-02 15:53 ` Drew Fustini 2024-05-02 15:53 ` Drew Fustini 2024-05-03 6:58 ` Thomas Bonnefille 2024-05-03 6:58 ` Thomas Bonnefille 2024-05-02 7:47 ` [PATCH RFC v2 0/4] clk: thead: Add support for TH1520 AP_SUBSYS clock controller Thomas Bonnefille 2024-05-02 7:47 ` Thomas Bonnefille
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