From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 25/34] pinctrl: mvebu: armada-xp: add spi1 function
Date: Tue, 9 Jun 2015 18:47:17 +0200 [thread overview]
Message-ID: <1433868446-11028-26-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1433868446-11028-1-git-send-email-thomas.petazzoni@free-electrons.com>
The latest Armada XP datasheet documents that some of the MPP pins can
be used to access the second SPI bus, labelled 'spi1'. This commit
adds the corresponding pins in the pinctrl driver and its DT binding
documentation.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
.../bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 26 +++++++++++++---------
drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 25 +++++++++++++++------
2 files changed, 33 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
index e8e0a27..5f64ee1 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
@@ -31,11 +31,11 @@ mpp9 9 gpio, ge0(rxd3), lcd(d9)
mpp10 10 gpio, ge0(rxctl), lcd(d10)
mpp11 11 gpio, ge0(rxclk), lcd(d11)
mpp12 12 gpio, ge0(txd4), ge1(txclkout), lcd(d12)
-mpp13 13 gpio, ge0(txd5), ge1(txd0), lcd(d13)
-mpp14 14 gpio, ge0(txd6), ge1(txd1), lcd(d15)
+mpp13 13 gpio, ge0(txd5), ge1(txd0), spi1(mosi), lcd(d13)
+mpp14 14 gpio, ge0(txd6), ge1(txd1), spi1(sck), lcd(d15)
mpp15 15 gpio, ge0(txd7), ge1(txd2), lcd(d16)
-mpp16 16 gpio, ge0(txd7), ge1(txd3), lcd(d16)
-mpp17 17 gpio, ge0(col), ge1(txctl), lcd(d17)
+mpp16 16 gpio, ge0(txd7), ge1(txd3), spi1(cs0), lcd(d16)
+mpp17 17 gpio, ge0(col), ge1(txctl), spi1(miso), lcd(d17)
mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)
mpp19 19 gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq)
mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
@@ -58,17 +58,21 @@ mpp36 36 gpio, spi0(mosi)
mpp37 37 gpio, spi0(miso)
mpp38 38 gpio, spi0(sck)
mpp39 39 gpio, spi0(cs0)
-mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0)
+mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),
+ spi1(cs1)
mpp41 41 gpio, spi0(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),
- pcie(clkreq1)
+ pcie(clkreq1), spi1(cs2)
mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm(timer)
-mpp43 43 gpio, uart2(txd), uart0(rts), spi0(cs3), pcie(rstout)
+mpp43 43 gpio, uart2(txd), uart0(rts), spi0(cs3), pcie(rstout),
+ spi1(cs3)
mpp44 44 gpio, uart2(cts), uart3(rxd), spi0(cs4), pcie(clkreq2),
- dram(bat)
-mpp45 45 gpio, uart2(rts), uart3(txd), spi0(cs5), sata1(prsnt)
-mpp46 46 gpio, uart3(rts), uart1(rts), spi0(cs6), sata0(prsnt)
+ dram(bat), spi1(cs4)
+mpp45 45 gpio, uart2(rts), uart3(txd), spi0(cs5), sata1(prsnt),
+ spi1(cs5)
+mpp46 46 gpio, uart3(rts), uart1(rts), spi0(cs6), sata0(prsnt),
+ spi1(cs6)
mpp47 47 gpio, uart3(cts), uart1(cts), spi0(cs7), pcie(clkreq3),
- ref(clkout)
+ ref(clkout), spi1(cs7)
mpp48 48 gpio, dev(clkout), dev(burst/last)
* Marvell Armada XP (mv78260 and mv78460 only)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
index 74ff211..4674462 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c
@@ -109,11 +109,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "mosi", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)),
MPP_MODE(14,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "sck", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)),
MPP_MODE(15,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -124,11 +126,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "cs0", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)),
MPP_MODE(17,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x3, "spi1", "miso", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)),
MPP_MODE(18,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
@@ -239,14 +243,16 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x1, "spi0", "cs1", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs1", V_MV78230_PLUS)),
MPP_MODE(41,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "spi0", "cs2", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs2", V_MV78230_PLUS)),
MPP_MODE(42,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS),
@@ -258,33 +264,38 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi0", "cs3", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs3", V_MV78230_PLUS)),
MPP_MODE(44,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi0", "cs4", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs4", V_MV78230_PLUS)),
MPP_MODE(45,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi0", "cs5", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs5", V_MV78230_PLUS)),
MPP_MODE(46,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi0", "cs6", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs6", V_MV78230_PLUS)),
MPP_MODE(47,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x3, "spi0", "cs7", V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS),
- MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS)),
+ MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS),
+ MPP_VAR_FUNCTION(0x6, "spi1", "cs7", V_MV78230_PLUS)),
MPP_MODE(48,
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS),
MPP_VAR_FUNCTION(0x1, "dev", "clkout", V_MV78230_PLUS),
--
2.1.0
next prev parent reply other threads:[~2015-06-09 16:47 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-09 16:46 [PATCH 00/34] pinctrl: mvebu: numerous fixes, cleanups and improvements Thomas Petazzoni
2015-06-09 16:46 ` [PATCH 01/34] pinctrl: mvebu: armada-38x: fix PCIe functions Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-10 8:51 ` Linus Walleij
2015-06-10 8:51 ` Linus Walleij
2015-06-09 16:46 ` [PATCH 02/34] pinctrl: mvebu: armada-370: fix spi0 pin description Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-10 8:52 ` Linus Walleij
2015-06-10 8:52 ` Linus Walleij
2015-06-09 16:46 ` [PATCH 03/34] pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-09 16:58 ` Andrew Lunn
2015-06-09 16:58 ` Andrew Lunn
2015-06-16 13:17 ` Thomas Petazzoni
2015-06-16 13:17 ` Thomas Petazzoni
2015-06-10 8:54 ` Linus Walleij
2015-06-10 8:54 ` Linus Walleij
2015-06-09 16:46 ` [PATCH 04/34] pinctrl: mvebu: armada-xp: remove non-existing NAND pins Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-09 16:46 ` [PATCH 05/34] pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-10 8:55 ` Linus Walleij
2015-06-10 8:55 ` Linus Walleij
2015-06-09 16:46 ` [PATCH 06/34] pinctrl: mvebu: armada-xp: fix functions of MPP48 Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-09 16:46 ` [PATCH 07/34] pinctrl: mvebu: armada-375: remove incorrect space in pin description Thomas Petazzoni
2015-06-09 16:46 ` Thomas Petazzoni
2015-06-09 16:47 ` [PATCH 08/34] pinctrl: mvebu: armada-38x: fix incorrect total number of GPIOs Thomas Petazzoni
2015-06-09 16:47 ` Thomas Petazzoni
2015-06-10 8:57 ` Linus Walleij
2015-06-10 8:57 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 09/34] pinctrl: mvebu: armada-39x: " Thomas Petazzoni
2015-06-09 16:47 ` Thomas Petazzoni
2015-06-09 16:47 ` [PATCH 10/34] pinctrl: mvebu: armada-{375, 38x, 39x}: normalize naming of PTP subnames Thomas Petazzoni
2015-06-10 8:59 ` [PATCH 10/34] pinctrl: mvebu: armada-{375,38x,39x}: " Linus Walleij
2015-06-09 16:47 ` [PATCH 11/34] pinctrl: mvebu: armada-{38x, 39x, xp}: normalize naming of DRAM functions Thomas Petazzoni
2015-06-10 9:08 ` [PATCH 11/34] pinctrl: mvebu: armada-{38x,39x,xp}: " Linus Walleij
2015-06-09 16:47 ` [PATCH 12/34] pinctrl: mvebu: armada-39x: normalize SATA present functionality naming Thomas Petazzoni
2015-06-10 9:09 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 13/34] pinctrl: mvebu: armada-39x: normalize SDIO pin naming Thomas Petazzoni
2015-06-10 9:10 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 14/34] pinctrl: mvebu: armada-{370, 375, 38x, 39x}: normalize dev pins Thomas Petazzoni
2015-06-10 9:11 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 15/34] pinctrl: mvebu: armada-39x: align NAND pin naming Thomas Petazzoni
2015-06-10 9:12 ` Linus Walleij
2015-06-10 9:15 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 16/34] pinctrl: mvebu: armada-{370, 375, 38x, 39x, xp}: normalize TDM pins Thomas Petazzoni
2015-06-10 11:36 ` [PATCH 16/34] pinctrl: mvebu: armada-{370,375,38x,39x,xp}: " Linus Walleij
2015-06-09 16:47 ` [PATCH 17/34] pinctrl: mvebu: armada-{370,375}: normalize PCIe pins Thomas Petazzoni
2015-06-10 11:43 ` [PATCH 17/34] pinctrl: mvebu: armada-{370, 375}: " Linus Walleij
2015-06-09 16:47 ` [PATCH 18/34] pinctrl: mvebu: armada-{370,375}: normalize audio pins Thomas Petazzoni
2015-06-10 11:44 ` [PATCH 18/34] pinctrl: mvebu: armada-{370, 375}: " Linus Walleij
2015-06-09 16:47 ` [PATCH 19/34] pinctrl: mvebu: armada-{370, xp}: normalize ethernet txclkout pins Thomas Petazzoni
2015-06-10 11:50 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 20/34] pinctrl: mvebu: armada-xp: fix binding documentation of ge1 pins Thomas Petazzoni
2015-06-10 11:56 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 21/34] pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet Thomas Petazzoni
2015-06-10 11:57 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 22/34] pinctrl: mvebu: armada-370: align spi1 clock pin naming Thomas Petazzoni
2015-06-10 12:00 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 23/34] pinctrl: mvebu: armada-xp: rename spi to spi0 Thomas Petazzoni
2015-06-09 16:53 ` Andrew Lunn
2015-06-10 12:02 ` Linus Walleij
2015-06-10 12:01 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 24/34] pinctrl: mvebu: armada-39x: normalize ref clock naming Thomas Petazzoni
2015-06-10 12:09 ` Linus Walleij
2015-06-09 16:47 ` Thomas Petazzoni [this message]
2015-06-10 12:10 ` [PATCH 25/34] pinctrl: mvebu: armada-xp: add spi1 function Linus Walleij
2015-06-09 16:47 ` [PATCH 26/34] pinctrl: mvebu: armada-xp: add nand rb function Thomas Petazzoni
2015-06-10 12:11 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 27/34] pinctrl: mvebu: armada-xp: add dram functions Thomas Petazzoni
2015-06-10 12:12 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 28/34] pinctrl: mvebu: armada-38x: add sata functions Thomas Petazzoni
2015-06-10 12:24 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 29/34] pinctrl: mvebu: armada-38x: add nand functions Thomas Petazzoni
2015-06-10 12:25 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 30/34] pinctrl: mvebu: armada-38x: add ua1 functions Thomas Petazzoni
2015-06-10 12:30 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 31/34] pinctrl: mvebu: armada-38x: add ptp functions Thomas Petazzoni
2015-06-10 12:31 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 32/34] pinctrl: mvebu: armada-39x: add missing PCIe functions Thomas Petazzoni
2015-06-10 12:32 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 33/34] pinctrl: mvebu: armada-39x: add missing SATA functions Thomas Petazzoni
2015-06-10 12:35 ` Linus Walleij
2015-06-09 16:47 ` [PATCH 34/34] pinctrl: mvebu: armada-39x: add support for Armada 395 variant Thomas Petazzoni
2015-06-10 12:37 ` Linus Walleij
2015-06-09 17:01 ` [PATCH 00/34] pinctrl: mvebu: numerous fixes, cleanups and improvements Andrew Lunn
2015-06-09 19:22 ` Thomas Petazzoni
2015-06-09 19:47 ` Andrew Lunn
2015-06-09 20:34 ` Thomas Petazzoni
2015-06-09 21:36 ` Andrew Lunn
2015-06-10 8:08 ` Thomas Petazzoni
2015-06-10 12:39 ` Linus Walleij
2015-06-13 15:53 ` Gregory CLEMENT
2015-06-29 10:49 ` Linus Walleij
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