From: Daniel Thompson <daniel.thompson@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Daniel Thompson <daniel.thompson@linaro.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org, patches@linaro.org,
linaro-kernel@lists.linaro.org,
John Stultz <john.stultz@linaro.org>,
Sumit Semwal <sumit.semwal@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Andrew Thoelke <andrew.thoelke@arm.com>,
Dave Martin <dave.martin@arm.com>
Subject: [RFC PATCH v2 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3)
Date: Mon, 14 Sep 2015 14:26:14 +0100 [thread overview]
Message-ID: <1442237181-17064-1-git-send-email-daniel.thompson@linaro.org> (raw)
This patchset provides a pseudo-NMI for arm64 kernels by reimplementing
the irqflags macros to modify the GIC PMR (the priority mask register is
accessible as a system register on GICv3 and later) rather than the
PSR. The patchset includes an implementation of
arch_trigger_all_cpu_backtrace() for arm64 allowing the new code to be
exercised.
The code works-for-me (tm) and is much more "real" than the last time I
shared these patches. However there remain a couple of limitations and
caveats:
1. Requires GICv3+ hardware to be effective. The alternatives runtime
patching system is employed so systems with earlier GIC architectures
are still bootable but will not benefit from NMI simulation.
2. Currently hardcoded to use ICC_PMR_EL1. Extra work might be needed
on the alternatives system so we can peacefully coexist with ARMv8.1
KVM support (when kernel will be running at EL2).
3. FVP needs a bit of hacking to be able to run <SysRq-L> from an ISR.
That's a shame because <SysRq-L> is a great way to observe an NMI
preempting an IRQ handler. Testers are welcome to ping me offline
and I can share the hacks (and DTs) I have been using to test with.
4. Testing for non regression on a GICv2 system will require this patch
to avoid crashes during <SysRq-L>:
http://article.gmane.org/gmane.linux.kernel/2037558
v2:
* Removed the isb instructions. The PMR is self-synchronizing so
these are not needed (Dave Martin)
* Use alternative runtime patching to allow the same kernel binary
to boot systems with and without GICv3+ (Dave Martin).
* Added code to properly distinguish between NMI and normal IRQ and to
call into NMI handling code where needed.
* Replaced the IPI backtrace logic with a newer version (from Russell
King).
Daniel Thompson (7):
irqchip: gic-v3: Reset BPR during initialization
arm64: Add support for on-demand backtrace of other CPUs
arm64: alternative: Apply alternatives early in boot process
arm64: irqflags: Reorder the fiq & async macros
arm64: irqflags: Use ICC sysregs to implement IRQ masking
arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIs
arm64: irqflags: Automatically identify I bit mis-management
arch/arm64/Kconfig | 15 ++++
arch/arm64/include/asm/alternative.h | 1 +
arch/arm64/include/asm/assembler.h | 56 ++++++++++++-
arch/arm64/include/asm/hardirq.h | 2 +-
arch/arm64/include/asm/irq.h | 3 +
arch/arm64/include/asm/irqflags.h | 154 +++++++++++++++++++++++++++++++++--
arch/arm64/include/asm/ptrace.h | 18 ++++
arch/arm64/include/asm/smp.h | 2 +
arch/arm64/kernel/alternative.c | 15 ++++
arch/arm64/kernel/entry.S | 149 +++++++++++++++++++++++++++------
arch/arm64/kernel/head.S | 35 ++++++++
arch/arm64/kernel/setup.c | 13 +++
arch/arm64/kernel/smp.c | 44 ++++++++++
arch/arm64/mm/proc.S | 23 ++++++
drivers/irqchip/irq-gic-v3.c | 117 +++++++++++++++++++++++++-
include/linux/irqchip/arm-gic-v3.h | 10 +++
include/linux/irqchip/arm-gic.h | 2 +-
lib/nmi_backtrace.c | 8 +-
18 files changed, 629 insertions(+), 38 deletions(-)
--
2.4.3
WARNING: multiple messages have this Message-ID (diff)
From: daniel.thompson@linaro.org (Daniel Thompson)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3)
Date: Mon, 14 Sep 2015 14:26:14 +0100 [thread overview]
Message-ID: <1442237181-17064-1-git-send-email-daniel.thompson@linaro.org> (raw)
This patchset provides a pseudo-NMI for arm64 kernels by reimplementing
the irqflags macros to modify the GIC PMR (the priority mask register is
accessible as a system register on GICv3 and later) rather than the
PSR. The patchset includes an implementation of
arch_trigger_all_cpu_backtrace() for arm64 allowing the new code to be
exercised.
The code works-for-me (tm) and is much more "real" than the last time I
shared these patches. However there remain a couple of limitations and
caveats:
1. Requires GICv3+ hardware to be effective. The alternatives runtime
patching system is employed so systems with earlier GIC architectures
are still bootable but will not benefit from NMI simulation.
2. Currently hardcoded to use ICC_PMR_EL1. Extra work might be needed
on the alternatives system so we can peacefully coexist with ARMv8.1
KVM support (when kernel will be running at EL2).
3. FVP needs a bit of hacking to be able to run <SysRq-L> from an ISR.
That's a shame because <SysRq-L> is a great way to observe an NMI
preempting an IRQ handler. Testers are welcome to ping me offline
and I can share the hacks (and DTs) I have been using to test with.
4. Testing for non regression on a GICv2 system will require this patch
to avoid crashes during <SysRq-L>:
http://article.gmane.org/gmane.linux.kernel/2037558
v2:
* Removed the isb instructions. The PMR is self-synchronizing so
these are not needed (Dave Martin)
* Use alternative runtime patching to allow the same kernel binary
to boot systems with and without GICv3+ (Dave Martin).
* Added code to properly distinguish between NMI and normal IRQ and to
call into NMI handling code where needed.
* Replaced the IPI backtrace logic with a newer version (from Russell
King).
Daniel Thompson (7):
irqchip: gic-v3: Reset BPR during initialization
arm64: Add support for on-demand backtrace of other CPUs
arm64: alternative: Apply alternatives early in boot process
arm64: irqflags: Reorder the fiq & async macros
arm64: irqflags: Use ICC sysregs to implement IRQ masking
arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIs
arm64: irqflags: Automatically identify I bit mis-management
arch/arm64/Kconfig | 15 ++++
arch/arm64/include/asm/alternative.h | 1 +
arch/arm64/include/asm/assembler.h | 56 ++++++++++++-
arch/arm64/include/asm/hardirq.h | 2 +-
arch/arm64/include/asm/irq.h | 3 +
arch/arm64/include/asm/irqflags.h | 154 +++++++++++++++++++++++++++++++++--
arch/arm64/include/asm/ptrace.h | 18 ++++
arch/arm64/include/asm/smp.h | 2 +
arch/arm64/kernel/alternative.c | 15 ++++
arch/arm64/kernel/entry.S | 149 +++++++++++++++++++++++++++------
arch/arm64/kernel/head.S | 35 ++++++++
arch/arm64/kernel/setup.c | 13 +++
arch/arm64/kernel/smp.c | 44 ++++++++++
arch/arm64/mm/proc.S | 23 ++++++
drivers/irqchip/irq-gic-v3.c | 117 +++++++++++++++++++++++++-
include/linux/irqchip/arm-gic-v3.h | 10 +++
include/linux/irqchip/arm-gic.h | 2 +-
lib/nmi_backtrace.c | 8 +-
18 files changed, 629 insertions(+), 38 deletions(-)
--
2.4.3
next reply other threads:[~2015-09-14 13:26 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-14 13:26 Daniel Thompson [this message]
2015-09-14 13:26 ` [RFC PATCH v2 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3) Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 1/7] irqchip: gic-v3: Reset BPR during initialization Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 2/7] arm64: Add support for on-demand backtrace of other CPUs Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 3/7] arm64: alternative: Apply alternatives early in boot process Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-16 13:05 ` Will Deacon
2015-09-16 13:05 ` Will Deacon
2015-09-16 15:51 ` Daniel Thompson
2015-09-16 15:51 ` Daniel Thompson
2015-09-16 16:24 ` Will Deacon
2015-09-16 16:24 ` Will Deacon
2015-09-17 13:25 ` Daniel Thompson
2015-09-17 13:25 ` Daniel Thompson
2015-09-17 14:01 ` Will Deacon
2015-09-17 14:01 ` Will Deacon
2015-09-17 15:28 ` Daniel Thompson
2015-09-17 15:28 ` Daniel Thompson
2015-09-17 15:43 ` Will Deacon
2015-09-17 15:43 ` Will Deacon
2015-09-14 13:26 ` [RFC PATCH v2 4/7] arm64: irqflags: Reorder the fiq & async macros Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 5/7] arm64: irqflags: Use ICC sysregs to implement IRQ masking Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 6/7] arm64: Implement IPI_CPU_BACKTRACE using pseudo-NMIs Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-14 13:26 ` [RFC PATCH v2 7/7] arm64: irqflags: Automatically identify I bit mis-management Daniel Thompson
2015-09-14 13:26 ` Daniel Thompson
2015-09-18 5:11 ` [RFC PATCH v2 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3) Jon Masters
2015-09-18 5:11 ` Jon Masters
2015-09-18 11:23 ` Daniel Thompson
2015-09-18 11:23 ` Daniel Thompson
2015-09-22 18:08 ` 答复: " Dingtianhong
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