From: Lan Tianyu <tianyu.lan@intel.com>
To: a.motakis@virtualopensystems.com, alex.williamson@redhat.com,
b.reynal@virtualopensystems.com, bhelgaas@google.com,
carolyn.wyborny@intel.com, donald.c.skidmore@intel.com,
eddie.dong@intel.com, nrupal.jani@intel.com, agraf@suse.de,
kvm@vger.kernel.org, pbonzini@redhat.com, qemu-devel@nongnu.org,
emil.s.tantilov@intel.com, gerlitz.or@gmail.com,
mark.d.rustad@intel.com, mst@redhat.com, eric.auger@linaro.org,
intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com,
jesse.brandeburg@intel.com, john.ronciak@intel.com,
linux-api@vger.kernel.org, linux-kernel@vger.kernel.org,
matthew.vick@intel.com, mitch.a.williams@intel.com,
netdev@vger.kernel.org, shannon.nelson@intel.com,
tianyu.lan@intel.com, weiyang@linux.vnet.ibm.com,
zajec5@gmail.com
Subject: [RFC PATCH V2 2/3] PCI: Add macros for faked PCI migration capability
Date: Tue, 24 Nov 2015 21:38:17 +0800 [thread overview]
Message-ID: <1448372298-28386-3-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1448372298-28386-1-git-send-email-tianyu.lan@intel.com>
This patch is to extend PCI CAP id for migration cap and
add reg macros. The CAP ID is trial and we may find better one if the
solution is feasible.
*PCI_VF_MIGRATION_CAP
For VF driver to control that triggers mailbox irq or not during migration.
*PCI_VF_MIGRATION_VMM_STATUS
Qemu stores migration status in the reg
*PCI_VF_MIGRATION_VF_STATUS
VF driver tells Qemu ready for migration
*PCI_VF_MIGRATION_IRQ
VF driver stores mailbox interrupt vector in the reg for Qemu to trigger during migration.
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
---
include/uapi/linux/pci_regs.h | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index efe3443..9defb6f 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -216,7 +216,8 @@
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
#define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Conf. */
#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
-#define PCI_CAP_ID_MAX PCI_CAP_ID_AF
+#define PCI_CAP_ID_MIGRATION 0X14
+#define PCI_CAP_ID_MAX PCI_CAP_ID_MIGRATION
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF 4
@@ -904,4 +905,19 @@
#define PCI_TPH_CAP_ST_SHIFT 16 /* st table shift */
#define PCI_TPH_BASE_SIZEOF 12 /* size with no st table */
+/* Migration*/
+#define PCI_VF_MIGRATION_CAP 0x04
+#define PCI_VF_MIGRATION_VMM_STATUS 0x05
+#define PCI_VF_MIGRATION_VF_STATUS 0x06
+#define PCI_VF_MIGRATION_IRQ 0x07
+
+#define PCI_VF_MIGRATION_DISABLE 0x00
+#define PCI_VF_MIGRATION_ENABLE 0x01
+
+#define VMM_MIGRATION_END 0x00
+#define VMM_MIGRATION_START 0x01
+
+#define PCI_VF_WAIT_FOR_MIGRATION 0x00
+#define PCI_VF_READY_FOR_MIGRATION 0x01
+
#endif /* LINUX_PCI_REGS_H */
--
1.8.4.rc0.1.g8f6a3e5.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Lan Tianyu <tianyu.lan@intel.com>
To: a.motakis@virtualopensystems.com, alex.williamson@redhat.com,
b.reynal@virtualopensystems.com, bhelgaas@google.com,
carolyn.wyborny@intel.com, donald.c.skidmore@intel.com,
eddie.dong@intel.com, nrupal.jani@intel.com, agraf@suse.de,
kvm@vger.kernel.org, pbonzini@redhat.com, qemu-devel@nongnu.org,
emil.s.tantilov@intel.com, gerlitz.or@gmail.com,
mark.d.rustad@intel.com, mst@redhat.com, eric.auger@linaro.org,
intel-wired-lan@lists.osuosl.org, jeffrey.t.kirsher@intel.com,
jesse.brandeburg@intel.com, john.ronciak@intel.com,
linux-api@vger.kernel.org, linux-kernel@vger.kernel.org,
matthew.vick@intel.com, mitch.a.williams@intel.com,
netdev@vger.kernel.org, shannon.nelson@intel.com,
tianyu.lan@intel.com, weiyang@linux.vnet.ibm.com,
zajec5@gmail.com
Subject: [Qemu-devel] [RFC PATCH V2 2/3] PCI: Add macros for faked PCI migration capability
Date: Tue, 24 Nov 2015 21:38:17 +0800 [thread overview]
Message-ID: <1448372298-28386-3-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1448372298-28386-1-git-send-email-tianyu.lan@intel.com>
This patch is to extend PCI CAP id for migration cap and
add reg macros. The CAP ID is trial and we may find better one if the
solution is feasible.
*PCI_VF_MIGRATION_CAP
For VF driver to control that triggers mailbox irq or not during migration.
*PCI_VF_MIGRATION_VMM_STATUS
Qemu stores migration status in the reg
*PCI_VF_MIGRATION_VF_STATUS
VF driver tells Qemu ready for migration
*PCI_VF_MIGRATION_IRQ
VF driver stores mailbox interrupt vector in the reg for Qemu to trigger during migration.
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
---
include/uapi/linux/pci_regs.h | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index efe3443..9defb6f 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -216,7 +216,8 @@
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
#define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Conf. */
#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
-#define PCI_CAP_ID_MAX PCI_CAP_ID_AF
+#define PCI_CAP_ID_MIGRATION 0X14
+#define PCI_CAP_ID_MAX PCI_CAP_ID_MIGRATION
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF 4
@@ -904,4 +905,19 @@
#define PCI_TPH_CAP_ST_SHIFT 16 /* st table shift */
#define PCI_TPH_BASE_SIZEOF 12 /* size with no st table */
+/* Migration*/
+#define PCI_VF_MIGRATION_CAP 0x04
+#define PCI_VF_MIGRATION_VMM_STATUS 0x05
+#define PCI_VF_MIGRATION_VF_STATUS 0x06
+#define PCI_VF_MIGRATION_IRQ 0x07
+
+#define PCI_VF_MIGRATION_DISABLE 0x00
+#define PCI_VF_MIGRATION_ENABLE 0x01
+
+#define VMM_MIGRATION_END 0x00
+#define VMM_MIGRATION_START 0x01
+
+#define PCI_VF_WAIT_FOR_MIGRATION 0x00
+#define PCI_VF_READY_FOR_MIGRATION 0x01
+
#endif /* LINUX_PCI_REGS_H */
--
1.8.4.rc0.1.g8f6a3e5.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Lan Tianyu <tianyu.lan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
b.reynal-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org,
bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
carolyn.wyborny-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
donald.c.skidmore-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
eddie.dong-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
nrupal.jani-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
agraf-l3A5Bk7waGM@public.gmane.org,
kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
pbonzini-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org,
emil.s.tantilov-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
gerlitz.or-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
mark.d.rustad-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
mst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
intel-wired-lan-qjLDD68F18P21nG7glBr7A@public.gmane.org,
jeffrey.t.kirsher-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
jesse.brandeburg-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
john.ronciak-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
linux-api-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
matthew.vick-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
mitch.a.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
shannon.nelson-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
tianyu.lan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
weiyang-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8@public.gmane.org,
zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [RFC PATCH V2 2/3] PCI: Add macros for faked PCI migration capability
Date: Tue, 24 Nov 2015 21:38:17 +0800 [thread overview]
Message-ID: <1448372298-28386-3-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1448372298-28386-1-git-send-email-tianyu.lan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
This patch is to extend PCI CAP id for migration cap and
add reg macros. The CAP ID is trial and we may find better one if the
solution is feasible.
*PCI_VF_MIGRATION_CAP
For VF driver to control that triggers mailbox irq or not during migration.
*PCI_VF_MIGRATION_VMM_STATUS
Qemu stores migration status in the reg
*PCI_VF_MIGRATION_VF_STATUS
VF driver tells Qemu ready for migration
*PCI_VF_MIGRATION_IRQ
VF driver stores mailbox interrupt vector in the reg for Qemu to trigger during migration.
Signed-off-by: Lan Tianyu <tianyu.lan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
---
include/uapi/linux/pci_regs.h | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index efe3443..9defb6f 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -216,7 +216,8 @@
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
#define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Conf. */
#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
-#define PCI_CAP_ID_MAX PCI_CAP_ID_AF
+#define PCI_CAP_ID_MIGRATION 0X14
+#define PCI_CAP_ID_MAX PCI_CAP_ID_MIGRATION
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF 4
@@ -904,4 +905,19 @@
#define PCI_TPH_CAP_ST_SHIFT 16 /* st table shift */
#define PCI_TPH_BASE_SIZEOF 12 /* size with no st table */
+/* Migration*/
+#define PCI_VF_MIGRATION_CAP 0x04
+#define PCI_VF_MIGRATION_VMM_STATUS 0x05
+#define PCI_VF_MIGRATION_VF_STATUS 0x06
+#define PCI_VF_MIGRATION_IRQ 0x07
+
+#define PCI_VF_MIGRATION_DISABLE 0x00
+#define PCI_VF_MIGRATION_ENABLE 0x01
+
+#define VMM_MIGRATION_END 0x00
+#define VMM_MIGRATION_START 0x01
+
+#define PCI_VF_WAIT_FOR_MIGRATION 0x00
+#define PCI_VF_READY_FOR_MIGRATION 0x01
+
#endif /* LINUX_PCI_REGS_H */
--
1.8.4.rc0.1.g8f6a3e5.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Lan Tianyu <tianyu.lan@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [RFC PATCH V2 2/3] PCI: Add macros for faked PCI migration capability
Date: Tue, 24 Nov 2015 21:38:17 +0800 [thread overview]
Message-ID: <1448372298-28386-3-git-send-email-tianyu.lan@intel.com> (raw)
In-Reply-To: <1448372298-28386-1-git-send-email-tianyu.lan@intel.com>
This patch is to extend PCI CAP id for migration cap and
add reg macros. The CAP ID is trial and we may find better one if the
solution is feasible.
*PCI_VF_MIGRATION_CAP
For VF driver to control that triggers mailbox irq or not during migration.
*PCI_VF_MIGRATION_VMM_STATUS
Qemu stores migration status in the reg
*PCI_VF_MIGRATION_VF_STATUS
VF driver tells Qemu ready for migration
*PCI_VF_MIGRATION_IRQ
VF driver stores mailbox interrupt vector in the reg for Qemu to trigger during migration.
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
---
include/uapi/linux/pci_regs.h | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index efe3443..9defb6f 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -216,7 +216,8 @@
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
#define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Conf. */
#define PCI_CAP_ID_AF 0x13 /* PCI Advanced Features */
-#define PCI_CAP_ID_MAX PCI_CAP_ID_AF
+#define PCI_CAP_ID_MIGRATION 0X14
+#define PCI_CAP_ID_MAX PCI_CAP_ID_MIGRATION
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF 4
@@ -904,4 +905,19 @@
#define PCI_TPH_CAP_ST_SHIFT 16 /* st table shift */
#define PCI_TPH_BASE_SIZEOF 12 /* size with no st table */
+/* Migration*/
+#define PCI_VF_MIGRATION_CAP 0x04
+#define PCI_VF_MIGRATION_VMM_STATUS 0x05
+#define PCI_VF_MIGRATION_VF_STATUS 0x06
+#define PCI_VF_MIGRATION_IRQ 0x07
+
+#define PCI_VF_MIGRATION_DISABLE 0x00
+#define PCI_VF_MIGRATION_ENABLE 0x01
+
+#define VMM_MIGRATION_END 0x00
+#define VMM_MIGRATION_START 0x01
+
+#define PCI_VF_WAIT_FOR_MIGRATION 0x00
+#define PCI_VF_READY_FOR_MIGRATION 0x01
+
#endif /* LINUX_PCI_REGS_H */
--
1.8.4.rc0.1.g8f6a3e5.dirty
next prev parent reply other threads:[~2015-11-24 13:53 UTC|newest]
Thread overview: 173+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-24 13:38 [RFC PATCH V2 0/3] IXGBE/VFIO: Add live migration support for SRIOV NIC Lan Tianyu
2015-11-24 13:38 ` [Intel-wired-lan] " Lan Tianyu
2015-11-24 13:38 ` [Qemu-devel] " Lan Tianyu
2015-11-24 13:38 ` [RFC PATCH V2 1/3] VFIO: Add new ioctl cmd VFIO_GET_PCI_CAP_INFO Lan Tianyu
2015-11-24 13:38 ` [Intel-wired-lan] " Lan Tianyu
2015-11-24 13:38 ` Lan Tianyu
2015-11-24 13:38 ` [Qemu-devel] " Lan Tianyu
2015-11-24 13:38 ` Lan Tianyu [this message]
2015-11-24 13:38 ` [Intel-wired-lan] [RFC PATCH V2 2/3] PCI: Add macros for faked PCI migration capability Lan Tianyu
2015-11-24 13:38 ` Lan Tianyu
2015-11-24 13:38 ` [Qemu-devel] " Lan Tianyu
2015-11-24 13:38 ` [RFC PATCH V2 3/3] Ixgbevf: Add migration support for ixgbevf driver Lan Tianyu
2015-11-24 13:38 ` [Intel-wired-lan] " Lan Tianyu
2015-11-24 13:38 ` [Qemu-devel] " Lan Tianyu
2015-11-24 21:20 ` Michael S. Tsirkin
2015-11-24 21:20 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-11-24 21:20 ` [Qemu-devel] " Michael S. Tsirkin
2015-11-25 5:39 ` Alexander Duyck
2015-11-25 5:39 ` [Intel-wired-lan] " Alexander Duyck
2015-11-25 5:39 ` Alexander Duyck
2015-11-25 5:39 ` Alexander Duyck
2015-11-25 5:39 ` [Qemu-devel] " Alexander Duyck
2015-11-25 5:39 ` Lan Tianyu
2015-11-25 5:39 ` [Intel-wired-lan] " Lan Tianyu
2015-11-25 5:39 ` Lan Tianyu
2015-11-25 5:39 ` [Qemu-devel] " Lan Tianyu
2015-11-25 12:28 ` Michael S. Tsirkin
2015-11-25 12:28 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-11-25 12:28 ` Michael S. Tsirkin
2015-11-25 12:28 ` [Qemu-devel] " Michael S. Tsirkin
2015-11-25 16:02 ` Lan, Tianyu
2015-11-25 16:02 ` [Intel-wired-lan] " Lan, Tianyu
2015-11-25 16:02 ` Lan, Tianyu
2015-11-25 16:02 ` [Qemu-devel] " Lan, Tianyu
2015-11-25 16:22 ` Michael S. Tsirkin
2015-11-25 16:22 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-11-25 16:22 ` [Qemu-devel] " Michael S. Tsirkin
2015-11-25 16:24 ` Alexander Duyck
2015-11-25 16:24 ` [Intel-wired-lan] " Alexander Duyck
2015-11-25 16:24 ` Alexander Duyck
2015-11-25 16:24 ` Alexander Duyck
2015-11-25 16:24 ` [Qemu-devel] " Alexander Duyck
2015-11-25 16:39 ` Michael S. Tsirkin
2015-11-25 16:39 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-11-25 16:39 ` Michael S. Tsirkin
2015-11-25 16:39 ` Michael S. Tsirkin
2015-11-25 16:39 ` [Qemu-devel] " Michael S. Tsirkin
2015-11-25 17:24 ` Alexander Duyck
2015-11-25 17:24 ` [Intel-wired-lan] " Alexander Duyck
2015-11-25 17:24 ` Alexander Duyck
2015-11-25 17:24 ` Alexander Duyck
2015-11-25 17:24 ` [Qemu-devel] " Alexander Duyck
2015-11-24 14:20 ` [RFC PATCH V2 0/3] IXGBE/VFIO: Add live migration support for SRIOV NIC Alexander Duyck
2015-11-24 14:20 ` [Intel-wired-lan] " Alexander Duyck
2015-11-24 14:20 ` [Qemu-devel] " Alexander Duyck
2015-11-25 3:18 ` Lan Tianyu
2015-11-25 3:18 ` [Intel-wired-lan] " Lan Tianyu
2015-11-25 3:18 ` Lan Tianyu
2015-11-25 3:18 ` [Qemu-devel] " Lan Tianyu
2015-11-25 5:30 ` Alexander Duyck
2015-11-25 5:30 ` [Intel-wired-lan] " Alexander Duyck
2015-11-25 5:30 ` Alexander Duyck
2015-11-25 5:30 ` Alexander Duyck
2015-11-25 5:30 ` [Qemu-devel] " Alexander Duyck
2015-11-25 8:21 ` Lan Tianyu
2015-11-25 8:21 ` [Intel-wired-lan] " Lan Tianyu
2015-11-25 8:21 ` Lan Tianyu
2015-11-25 8:21 ` Lan Tianyu
2015-11-25 8:21 ` [Qemu-devel] " Lan Tianyu
2015-11-25 15:32 ` Alexander Duyck
2015-11-25 15:32 ` [Intel-wired-lan] " Alexander Duyck
2015-11-25 15:32 ` Alexander Duyck
2015-11-25 15:32 ` Alexander Duyck
2015-11-25 15:32 ` [Qemu-devel] " Alexander Duyck
2015-11-26 3:15 ` Dong, Eddie
2015-11-26 3:15 ` [Intel-wired-lan] " Dong, Eddie
2015-11-26 3:15 ` Dong, Eddie
2015-11-26 3:15 ` Dong, Eddie
2015-11-26 3:15 ` [Qemu-devel] " Dong, Eddie
2015-11-26 3:56 ` Alexander Duyck
2015-11-26 3:56 ` [Intel-wired-lan] " Alexander Duyck
2015-11-26 3:56 ` Alexander Duyck
2015-11-26 3:56 ` Alexander Duyck
2015-11-26 3:56 ` [Qemu-devel] " Alexander Duyck
2015-11-30 6:53 ` Lan, Tianyu
2015-11-30 6:53 ` [Intel-wired-lan] " Lan, Tianyu
2015-11-30 6:53 ` Lan, Tianyu
2015-11-30 6:53 ` Lan, Tianyu
2015-11-30 6:53 ` [Qemu-devel] " Lan, Tianyu
2015-11-30 16:07 ` Alexander Duyck
2015-11-30 16:07 ` [Intel-wired-lan] " Alexander Duyck
2015-11-30 16:07 ` Alexander Duyck
2015-11-30 16:07 ` [Qemu-devel] " Alexander Duyck
2015-12-01 15:04 ` Lan, Tianyu
2015-12-01 15:04 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-01 15:04 ` Lan, Tianyu
2015-12-01 15:04 ` [Qemu-devel] " Lan, Tianyu
2015-12-01 15:28 ` Michael S. Tsirkin
2015-12-01 15:28 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-01 15:28 ` Michael S. Tsirkin
2015-12-01 15:28 ` Michael S. Tsirkin
2015-12-01 15:28 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-01 17:04 ` Alexander Duyck
2015-12-01 17:04 ` [Intel-wired-lan] " Alexander Duyck
2015-12-01 17:04 ` Alexander Duyck
2015-12-01 17:04 ` [Qemu-devel] " Alexander Duyck
2015-12-01 17:37 ` Michael S. Tsirkin
2015-12-01 17:37 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-01 17:37 ` Michael S. Tsirkin
2015-12-01 17:37 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-01 18:36 ` Alexander Duyck
2015-12-01 18:36 ` [Intel-wired-lan] " Alexander Duyck
2015-12-01 18:36 ` Alexander Duyck
2015-12-01 18:36 ` [Qemu-devel] " Alexander Duyck
2015-12-02 11:44 ` Michael S. Tsirkin
2015-12-02 11:44 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-02 11:44 ` Michael S. Tsirkin
2015-12-02 11:44 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-04 16:32 ` Lan, Tianyu
2015-12-04 16:32 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-04 16:32 ` Lan, Tianyu
2015-12-04 16:32 ` Lan, Tianyu
2015-12-04 16:32 ` [Qemu-devel] " Lan, Tianyu
2015-12-04 17:07 ` Alexander Duyck
2015-12-04 17:07 ` [Intel-wired-lan] " Alexander Duyck
2015-12-04 17:07 ` Alexander Duyck
2015-12-04 17:07 ` Alexander Duyck
2015-12-04 17:07 ` [Qemu-devel] " Alexander Duyck
2015-12-07 15:40 ` Lan, Tianyu
2015-12-07 15:40 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-07 15:40 ` Lan, Tianyu
2015-12-07 15:40 ` Lan, Tianyu
2015-12-07 15:40 ` [Qemu-devel] " Lan, Tianyu
2015-12-07 17:12 ` Alexander Duyck
2015-12-07 17:12 ` [Intel-wired-lan] " Alexander Duyck
2015-12-07 17:12 ` Alexander Duyck
2015-12-07 17:12 ` [Qemu-devel] " Alexander Duyck
2015-12-07 17:39 ` Michael S. Tsirkin
2015-12-07 17:39 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-07 17:39 ` Michael S. Tsirkin
2015-12-07 17:39 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-07 18:42 ` Alexander Duyck
2015-12-07 18:42 ` [Intel-wired-lan] " Alexander Duyck
2015-12-07 18:42 ` Alexander Duyck
2015-12-07 18:42 ` [Qemu-devel] " Alexander Duyck
2015-12-09 9:28 ` Lan, Tianyu
2015-12-09 9:28 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-09 9:28 ` Lan, Tianyu
2015-12-09 9:28 ` [Qemu-devel] " Lan, Tianyu
2015-12-09 16:36 ` Alexander Duyck
2015-12-09 16:36 ` [Intel-wired-lan] " Alexander Duyck
2015-12-09 16:36 ` Alexander Duyck
2015-12-09 16:36 ` [Qemu-devel] " Alexander Duyck
2015-12-09 10:37 ` Michael S. Tsirkin
2015-12-09 10:37 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-09 10:37 ` Michael S. Tsirkin
2015-12-09 10:37 ` Michael S. Tsirkin
2015-12-09 10:37 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-09 11:19 ` Lan, Tianyu
2015-12-09 11:19 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-09 11:19 ` Lan, Tianyu
2015-12-09 11:19 ` Lan, Tianyu
2015-12-09 11:19 ` [Qemu-devel] " Lan, Tianyu
2015-12-09 11:28 ` Michael S. Tsirkin
2015-12-09 11:28 ` [Intel-wired-lan] " Michael S. Tsirkin
2015-12-09 11:28 ` Michael S. Tsirkin
2015-12-09 11:28 ` Michael S. Tsirkin
2015-12-09 11:28 ` [Qemu-devel] " Michael S. Tsirkin
2015-12-09 11:41 ` Lan, Tianyu
2015-12-09 11:41 ` [Intel-wired-lan] " Lan, Tianyu
2015-12-09 11:41 ` Lan, Tianyu
2015-12-09 11:41 ` Lan, Tianyu
2015-12-09 11:41 ` [Qemu-devel] " Lan, Tianyu
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