From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 13/24] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties
Date: Tue, 16 Jan 2018 13:34:08 +0000 [thread overview]
Message-ID: <1516109659-1557-14-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Add common/sysbus/pci/sdbus comments to have clearer code blocks separation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180115182436.2066-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/sd/sdhci.h | 4 +++-
hw/sd/sdhci.c | 25 +++++++++++++++++--------
2 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index dacd726..8041c96 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -79,13 +79,15 @@ typedef struct SDHCIState {
uint32_t buf_maxsz;
uint16_t data_count; /* current element in FIFO buffer */
uint8_t stopped_state;/* Current SDHC state */
- bool pending_insert_quirk;/* Quirk for Raspberry Pi card insert int */
bool pending_insert_state;
/* Buffer Data Port Register - virtual access point to R and W buffers */
/* Software Reset Register - always reads as 0 */
/* Force Event Auto CMD12 Error Interrupt Reg - write only */
/* Force Event Error Interrupt Register- write only */
/* RO Host Controller Version Register always reads as 0x2401 */
+
+ /* Configurable properties */
+ bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
} SDHCIState;
#define TYPE_PCI_SDHCI "sdhci-pci"
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 365bc80..c0b4b84 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -23,6 +23,7 @@
*/
#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "hw/hw.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
@@ -1185,6 +1186,14 @@ static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
}
}
+/* --- qdev common --- */
+
+#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
+ /* Capabilities registers provide information on supported features
+ * of this specific host controller implementation */ \
+ DEFINE_PROP_UINT32("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
+ DEFINE_PROP_UINT32("maxcurr", _state, maxcurr, 0)
+
static void sdhci_initfn(SDHCIState *s)
{
qbus_create_inplace(&s->sdbus, sizeof(s->sdbus),
@@ -1264,12 +1273,10 @@ const VMStateDescription sdhci_vmstate = {
},
};
-/* Capabilities registers provide information on supported features of this
- * specific host controller implementation */
+/* --- qdev PCI --- */
+
static Property sdhci_pci_properties[] = {
- DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
- SDHC_CAPAB_REG_DEFAULT),
- DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
+ DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1320,10 +1327,10 @@ static const TypeInfo sdhci_pci_info = {
},
};
+/* --- qdev SysBus --- */
+
static Property sdhci_sysbus_properties[] = {
- DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
- SDHC_CAPAB_REG_DEFAULT),
- DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
+ DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState),
DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
false),
DEFINE_PROP_END_OF_LIST(),
@@ -1374,6 +1381,8 @@ static const TypeInfo sdhci_sysbus_info = {
.class_init = sdhci_sysbus_class_init,
};
+/* --- qdev bus master --- */
+
static void sdhci_bus_class_init(ObjectClass *klass, void *data)
{
SDBusClass *sbc = SD_BUS_CLASS(klass);
--
2.7.4
next prev parent reply other threads:[~2018-01-16 13:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-16 13:33 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 01/24] hw/intc/armv7m: Support byte and halfword accesses to CFSR Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 02/24] get_phys_addr_pmsav7: Support AP=0b111 for v7M Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 03/24] hw/arm/virt: Add virt-2.12 machine type Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 04/24] target/arm: Handle page table walk load failures correctly Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 05/24] hw/sd/pl181: Reset SD card on controller reset Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 06/24] hw/sd/milkymist-memcard: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 07/24] hw/sd/ssi-sd: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 08/24] hw/sd/omap_mmc: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 09/24] target/arm: Split out vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 10/24] target/arm: Add fp16 support to vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 11/24] sdhci: clean up includes Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 12/24] sdhci: remove dead code Peter Maydell
2018-01-16 13:34 ` Peter Maydell [this message]
2018-01-16 13:34 ` [Qemu-devel] [PULL 14/24] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 16/24] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 17/24] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 18/24] sdhci: convert the DPRINT() calls into trace events Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 19/24] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 20/24] sdhci: rename the SDHC_CAPAB register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 21/24] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 22/24] sdhci: Implement write method of ACMD12ERRSTS register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 23/24] sdhci: fix the PCI device, using the PCI address space for DMA Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 24/24] sdhci: add a 'dma' property to the sysbus devices Peter Maydell
2018-01-16 15:44 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
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