From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 19/24] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h"
Date: Tue, 16 Jan 2018 13:34:14 +0000 [thread overview]
Message-ID: <1516109659-1557-20-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 20180115182436.2066-10-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/sd/sdhci-internal.h | 1 +
hw/sd/sdhci.c | 3 +--
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index 248fd02..e941bc2 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -43,6 +43,7 @@
#define SDHC_TRNS_ACMD12 0x0004
#define SDHC_TRNS_READ 0x0010
#define SDHC_TRNS_MULTI 0x0020
+#define SDHC_TRNMOD_MASK 0x0037
/* R/W Command Register 0x0 */
#define SDHC_CMDREG 0x0E
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 68f1aee..4265b6a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -99,7 +99,6 @@
(SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \
(SDHC_CAPAB_TOCLKFREQ))
-#define MASK_TRNMOD 0x0037
#define MASKED_WRITE(reg, mask, val) (reg = (reg & (mask)) | (val))
static uint8_t sdhci_slotint(SDHCIState *s)
@@ -1026,7 +1025,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
if (!(s->capareg & SDHC_CAN_DO_DMA)) {
value &= ~SDHC_TRNS_DMA;
}
- MASKED_WRITE(s->trnmod, mask, value & MASK_TRNMOD);
+ MASKED_WRITE(s->trnmod, mask, value & SDHC_TRNMOD_MASK);
MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16);
/* Writing to the upper byte of CMDREG triggers SD command generation */
--
2.7.4
next prev parent reply other threads:[~2018-01-16 13:34 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-16 13:33 [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 01/24] hw/intc/armv7m: Support byte and halfword accesses to CFSR Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 02/24] get_phys_addr_pmsav7: Support AP=0b111 for v7M Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 03/24] hw/arm/virt: Add virt-2.12 machine type Peter Maydell
2018-01-16 13:33 ` [Qemu-devel] [PULL 04/24] target/arm: Handle page table walk load failures correctly Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 05/24] hw/sd/pl181: Reset SD card on controller reset Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 06/24] hw/sd/milkymist-memcard: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 07/24] hw/sd/ssi-sd: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 08/24] hw/sd/omap_mmc: " Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 09/24] target/arm: Split out vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 10/24] target/arm: Add fp16 support to vfp_expand_imm Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 11/24] sdhci: clean up includes Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 12/24] sdhci: remove dead code Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 13/24] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 14/24] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 16/24] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 17/24] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 18/24] sdhci: convert the DPRINT() calls into trace events Peter Maydell
2018-01-16 13:34 ` Peter Maydell [this message]
2018-01-16 13:34 ` [Qemu-devel] [PULL 20/24] sdhci: rename the SDHC_CAPAB register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 21/24] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 22/24] sdhci: Implement write method of ACMD12ERRSTS register Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 23/24] sdhci: fix the PCI device, using the PCI address space for DMA Peter Maydell
2018-01-16 13:34 ` [Qemu-devel] [PULL 24/24] sdhci: add a 'dma' property to the sysbus devices Peter Maydell
2018-01-16 15:44 ` [Qemu-devel] [PULL 00/24] target-arm queue Peter Maydell
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