* [RESEND PATCH v2 0/3] RPMCC for SM6125 @ 2021-06-29 10:26 Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible Martin Botka ` (3 more replies) 0 siblings, 4 replies; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:26 UTC (permalink / raw) To: martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel This patch series adds support for the RPMCC found in SM6125 SoC. In this resend i didnt include 2 patches that were already merged. Changes in v2: Add commit description to all the patches Martin Botka (3): rpmcc: Add sm6125 compatible dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible rpmcc: Add support for SM6125 .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + drivers/clk/qcom/clk-smd-rpm.c | 56 +++++++++++++++++++ include/linux/soc/qcom/smd-rpm.h | 1 + 3 files changed, 58 insertions(+) -- 2.32.0 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible 2021-06-29 10:26 [RESEND PATCH v2 0/3] RPMCC for SM6125 Martin Botka @ 2021-06-29 10:26 ` Martin Botka 2021-07-27 21:47 ` Stephen Boyd 2021-06-29 10:26 ` [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible Martin Botka ` (2 subsequent siblings) 3 siblings, 1 reply; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:26 UTC (permalink / raw) To: martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Add a compatible for SM6125 and assing correct data Signed-off-by: Martin Botka <martin.botka@somainline.org> --- drivers/clk/qcom/clk-smd-rpm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 0e1dfa89489e..8200c26b968c 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -1070,6 +1070,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 }, { .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 }, { .compatible = "qcom,rpmcc-sdm660", .data = &rpm_clk_sdm660 }, + { .compatible = "qcom,rpmcc-sm6125", .data = &rpm_clk_sm6125 }, { } }; MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table); -- 2.32.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible 2021-06-29 10:26 ` [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible Martin Botka @ 2021-07-27 21:47 ` Stephen Boyd 2021-07-30 20:07 ` Martin Botka 0 siblings, 1 reply; 14+ messages in thread From: Stephen Boyd @ 2021-07-27 21:47 UTC (permalink / raw) To: Martin Botka, martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Quoting Martin Botka (2021-06-29 03:26:21) > Add a compatible for SM6125 and assing correct data > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- This patch needs to be combined with the one that introduces rpm_clk_sm6125. > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index 0e1dfa89489e..8200c26b968c 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -1070,6 +1070,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { > { .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 }, > { .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 }, > { .compatible = "qcom,rpmcc-sdm660", .data = &rpm_clk_sdm660 }, > + { .compatible = "qcom,rpmcc-sm6125", .data = &rpm_clk_sm6125 }, ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible 2021-07-27 21:47 ` Stephen Boyd @ 2021-07-30 20:07 ` Martin Botka 0 siblings, 0 replies; 14+ messages in thread From: Martin Botka @ 2021-07-30 20:07 UTC (permalink / raw) To: Stephen Boyd Cc: martin.botka1, ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel On Tue, Jul 27 2021 at 02:47:44 PM -0700, Stephen Boyd <sboyd@kernel.org> wrote: > Quoting Martin Botka (2021-06-29 03:26:21) >> Add a compatible for SM6125 and assing correct data >> >> Signed-off-by: Martin Botka <martin.botka@somainline.org> >> --- > > This patch needs to be combined with the one that introduces > rpm_clk_sm6125. > >> + { .compatible = "qcom,rpmcc-sm6125", .data = >> &rpm_clk_sm6125 }, >> diff --git a/drivers/clk/qcom/clk-smd-rpm.c >> b/drivers/clk/qcom/clk-smd-rpm.c >> index 0e1dfa89489e..8200c26b968c 100644 >> --- a/drivers/clk/qcom/clk-smd-rpm.c >> +++ b/drivers/clk/qcom/clk-smd-rpm.c >> @@ -1070,6 +1070,7 @@ static const struct of_device_id >> rpm_smd_clk_match_table[] = { >> { .compatible = "qcom,rpmcc-msm8998", .data = >> &rpm_clk_msm8998 }, >> { .compatible = "qcom,rpmcc-qcs404", .data = >> &rpm_clk_qcs404 }, >> { .compatible = "qcom,rpmcc-sdm660", .data = >> &rpm_clk_sdm660 }, > OK. ^ permalink raw reply [flat|nested] 14+ messages in thread
* [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible 2021-06-29 10:26 [RESEND PATCH v2 0/3] RPMCC for SM6125 Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible Martin Botka @ 2021-06-29 10:26 ` Martin Botka 2021-07-14 21:08 ` Rob Herring 2021-07-27 21:48 ` Stephen Boyd 2021-06-29 10:26 ` [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 Martin Botka 2021-06-29 10:27 ` [RESEND PATCH v2 0/3] RPMCC " Martin Botka 3 siblings, 2 replies; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:26 UTC (permalink / raw) To: martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Document the newly added compatible for sm6125 rpmcc. Signed-off-by: Martin Botka <martin.botka@somainline.org> --- Documentation/devicetree/bindings/clock/qcom,rpmcc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt index b44a0622fb3a..bc6ef573aa7c 100644 --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt @@ -24,6 +24,7 @@ Required properties : "qcom,rpmcc-msm8998", "qcom,rpmcc" "qcom,rpmcc-qcs404", "qcom,rpmcc" "qcom,rpmcc-sdm660", "qcom,rpmcc" + "qcom,rpmcc-sm6125", "qcom,rpmcc" - #clock-cells : shall contain 1 -- 2.32.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible 2021-06-29 10:26 ` [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible Martin Botka @ 2021-07-14 21:08 ` Rob Herring 2021-07-27 21:48 ` Stephen Boyd 1 sibling, 0 replies; 14+ messages in thread From: Rob Herring @ 2021-07-14 21:08 UTC (permalink / raw) To: Martin Botka Cc: Bjorn Andersson, angelogioacchino.delregno, Michael Turquette, linux-kernel, martin.botka1, paul.bouchara, konrad.dybcio, marijn.suijten, Stephen Boyd, jamipkettunen, Andy Gross, Rob Herring, linux-clk, linux-arm-msm, ~postmarketos/upstreaming, devicetree On Tue, 29 Jun 2021 12:26:22 +0200, Martin Botka wrote: > Document the newly added compatible for sm6125 rpmcc. > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- > Documentation/devicetree/bindings/clock/qcom,rpmcc.txt | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible 2021-06-29 10:26 ` [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible Martin Botka 2021-07-14 21:08 ` Rob Herring @ 2021-07-27 21:48 ` Stephen Boyd 1 sibling, 0 replies; 14+ messages in thread From: Stephen Boyd @ 2021-07-27 21:48 UTC (permalink / raw) To: Martin Botka, martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Quoting Martin Botka (2021-06-29 03:26:22) > Document the newly added compatible for sm6125 rpmcc. > > Signed-off-by: Martin Botka <martin.botka@somainline.org> > --- Applied to clk-next ^ permalink raw reply [flat|nested] 14+ messages in thread
* [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-06-29 10:26 [RESEND PATCH v2 0/3] RPMCC for SM6125 Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible Martin Botka @ 2021-06-29 10:26 ` Martin Botka 2021-07-27 21:46 ` Stephen Boyd 2021-06-29 10:27 ` [RESEND PATCH v2 0/3] RPMCC " Martin Botka 3 siblings, 1 reply; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:26 UTC (permalink / raw) To: martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel This commit adds support for RPM clocks found in SM6125 SoC Signed-off-by: Martin Botka <martin.botka@somainline.org> --- drivers/clk/qcom/clk-smd-rpm.c | 55 ++++++++++++++++++++++++++++++++ include/linux/soc/qcom/smd-rpm.h | 1 + 2 files changed, 56 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 8200c26b968c..51458f740ba0 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { .num_clks = ARRAY_SIZE(sdm660_clks), }; +/* SM6125 */ +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, + QCOM_SMD_RPM_MISC_CLK, 0, 19200000); +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1, 19200000); +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1); +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, + QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, + QCOM_SMD_RPM_BUS_CLK, 5); + +/* SMD_XO_BUFFER */ +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); + +static struct clk_smd_rpm *sm6125_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, +}; + +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { + .clks = sm6125_clks, + .num_clks = ARRAY_SIZE(sm6125_clks), +}; + static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 }, diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index f2645ec52520..b737d7e456e4 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -28,6 +28,7 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_NCPA 0x6170636E #define QCOM_SMD_RPM_NCPB 0x6270636E #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 #define QCOM_SMD_RPM_SMPA 0x61706d73 #define QCOM_SMD_RPM_SMPB 0x62706d73 -- 2.32.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-06-29 10:26 ` [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 Martin Botka @ 2021-07-27 21:46 ` Stephen Boyd 2021-07-30 20:07 ` Martin Botka 2021-07-30 20:20 ` Martin Botka 0 siblings, 2 replies; 14+ messages in thread From: Stephen Boyd @ 2021-07-27 21:46 UTC (permalink / raw) To: Martin Botka, martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Quoting Martin Botka (2021-06-29 03:26:23) > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index 8200c26b968c..51458f740ba0 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { > .num_clks = ARRAY_SIZE(sdm660_clks), > }; > > +/* SM6125 */ > +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, > + QCOM_SMD_RPM_MISC_CLK, 0, 19200000); > +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); > +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); Can we use msm8916_bimc_clk? > +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); > +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, > + QCOM_SMD_RPM_MISC_CLK, 1, 19200000); > +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); Can we use msm8992_ce1_clk? > +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); Can we use msm8976_ipa_clk? > +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0); > +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0); > +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1); > +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, > + QCOM_SMD_RPM_BUS_CLK, 0); > +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, > + QCOM_SMD_RPM_BUS_CLK, 5); > + > +/* SMD_XO_BUFFER */ > +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); msm8916? > +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); msm8916? > +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); sdm660? > +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); msm8916? > +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); msm8916? > + > +static struct clk_smd_rpm *sm6125_clks[] = { > + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, > + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, > + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, > + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, > + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, > + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, > + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, > + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, > + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, > + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, > + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, > + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, > + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, > + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, > + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, > + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, > + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, > + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, > + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, > + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, > + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, > + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, > +}; > + > +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { > + .clks = sm6125_clks, > + .num_clks = ARRAY_SIZE(sm6125_clks), > +}; > + > static const struct of_device_id rpm_smd_clk_match_table[] = { > { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, > { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 }, > diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h > index f2645ec52520..b737d7e456e4 100644 > --- a/include/linux/soc/qcom/smd-rpm.h > +++ b/include/linux/soc/qcom/smd-rpm.h > @@ -28,6 +28,7 @@ struct qcom_smd_rpm; > #define QCOM_SMD_RPM_NCPA 0x6170636E > #define QCOM_SMD_RPM_NCPB 0x6270636E > #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f > +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 > #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 > #define QCOM_SMD_RPM_SMPA 0x61706d73 > #define QCOM_SMD_RPM_SMPB 0x62706d73 Two patches are adding this in different places. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-07-27 21:46 ` Stephen Boyd @ 2021-07-30 20:07 ` Martin Botka 2021-07-30 20:20 ` Martin Botka 1 sibling, 0 replies; 14+ messages in thread From: Martin Botka @ 2021-07-30 20:07 UTC (permalink / raw) To: Stephen Boyd Cc: martin.botka1, ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel On Tue, Jul 27 2021 at 02:46:39 PM -0700, Stephen Boyd <sboyd@kernel.org> wrote: > Quoting Martin Botka (2021-06-29 03:26:23) >> diff --git a/drivers/clk/qcom/clk-smd-rpm.c >> b/drivers/clk/qcom/clk-smd-rpm.c >> index 8200c26b968c..51458f740ba0 100644 >> --- a/drivers/clk/qcom/clk-smd-rpm.c >> +++ b/drivers/clk/qcom/clk-smd-rpm.c >> @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc >> rpm_clk_sdm660 = { >> .num_clks = ARRAY_SIZE(sdm660_clks), >> }; >> >> +/* SM6125 */ >> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, >> + QCOM_SMD_RPM_MISC_CLK, 0, >> 19200000); >> +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, >> QCOM_SMD_RPM_BUS_CLK, 1); >> +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, >> QCOM_SMD_RPM_MEM_CLK, 0); > > Can we use msm8916_bimc_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, >> QCOM_SMD_RPM_BUS_CLK, 2); >> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, >> + QCOM_SMD_RPM_MISC_CLK, 1, >> 19200000); >> +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, >> QCOM_SMD_RPM_CE_CLK, 0); > > Can we use msm8992_ce1_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, >> QCOM_SMD_RPM_IPA_CLK, 0); > > Can we use msm8976_ipa_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, >> QCOM_SMD_RPM_QUP_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, >> QCOM_SMD_RPM_MMAXI_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, >> QCOM_SMD_RPM_MMAXI_CLK, 1); >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, >> + >> QCOM_SMD_RPM_BUS_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, >> + >> QCOM_SMD_RPM_BUS_CLK, 5); >> + >> +/* SMD_XO_BUFFER */ >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); > > msm8916? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); > > msm8916? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); > > sdm660? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); > > msm8916? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); > > msm8916? > Will do to all. >> + >> +static struct clk_smd_rpm *sm6125_clks[] = { >> + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, >> + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, >> + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, >> + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, >> + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, >> + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, >> + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, >> + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, >> + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, >> + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, >> + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, >> + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, >> + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, >> + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, >> + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, >> + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, >> + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, >> + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, >> + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, >> + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, >> + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, >> + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, >> +}; >> + >> +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { >> + .clks = sm6125_clks, >> + .num_clks = ARRAY_SIZE(sm6125_clks), >> +}; >> + >> static const struct of_device_id rpm_smd_clk_match_table[] = { >> { .compatible = "qcom,rpmcc-msm8916", .data = >> &rpm_clk_msm8916 }, >> { .compatible = "qcom,rpmcc-msm8936", .data = >> &rpm_clk_msm8936 }, >> diff --git a/include/linux/soc/qcom/smd-rpm.h >> b/include/linux/soc/qcom/smd-rpm.h >> index f2645ec52520..b737d7e456e4 100644 >> --- a/include/linux/soc/qcom/smd-rpm.h >> +++ b/include/linux/soc/qcom/smd-rpm.h >> @@ -28,6 +28,7 @@ struct qcom_smd_rpm; >> #define QCOM_SMD_RPM_NCPA 0x6170636E >> #define QCOM_SMD_RPM_NCPB 0x6270636E >> #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f >> +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 >> #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 >> #define QCOM_SMD_RPM_SMPA 0x61706d73 >> #define QCOM_SMD_RPM_SMPB 0x62706d73 > > Two patches are adding this in different places. Im aware. I will argue tho that adding it in alphabetical order is the correct way to go here. Thats how the rest is done except the last 4 defines in that block which probably should be moved into their alphabetical order as well (They do not follow address ordering). ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-07-27 21:46 ` Stephen Boyd 2021-07-30 20:07 ` Martin Botka @ 2021-07-30 20:20 ` Martin Botka 2021-07-30 20:23 ` Martin Botka 1 sibling, 1 reply; 14+ messages in thread From: Martin Botka @ 2021-07-30 20:20 UTC (permalink / raw) To: Stephen Boyd Cc: martin.botka1, ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Actually not all. On Tue, Jul 27 2021 at 02:46:39 PM -0700, Stephen Boyd <sboyd@kernel.org> wrote: > Quoting Martin Botka (2021-06-29 03:26:23) >> diff --git a/drivers/clk/qcom/clk-smd-rpm.c >> b/drivers/clk/qcom/clk-smd-rpm.c >> index 8200c26b968c..51458f740ba0 100644 >> --- a/drivers/clk/qcom/clk-smd-rpm.c >> +++ b/drivers/clk/qcom/clk-smd-rpm.c >> @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc >> rpm_clk_sdm660 = { >> .num_clks = ARRAY_SIZE(sdm660_clks), >> }; >> >> +/* SM6125 */ >> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, >> + QCOM_SMD_RPM_MISC_CLK, 0, >> 19200000); >> +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, >> QCOM_SMD_RPM_BUS_CLK, 1); >> +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, >> QCOM_SMD_RPM_MEM_CLK, 0); > > Can we use msm8916_bimc_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, >> QCOM_SMD_RPM_BUS_CLK, 2); >> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, >> + QCOM_SMD_RPM_MISC_CLK, 1, >> 19200000); >> +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, >> QCOM_SMD_RPM_CE_CLK, 0); > > Can we use msm8992_ce1_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, >> QCOM_SMD_RPM_IPA_CLK, 0); > > Can we use msm8976_ipa_clk? > >> +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, >> QCOM_SMD_RPM_QUP_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, >> QCOM_SMD_RPM_MMAXI_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, >> QCOM_SMD_RPM_MMAXI_CLK, 1); >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, >> + >> QCOM_SMD_RPM_BUS_CLK, 0); >> +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, >> + >> QCOM_SMD_RPM_BUS_CLK, 5); >> + >> +/* SMD_XO_BUFFER */ >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); > > msm8916? msm8916 one is not ln_. > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); > > msm8916? Same reason. > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); > > sdm660? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); > > msm8916? > >> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); > > msm8916? > >> + >> +static struct clk_smd_rpm *sm6125_clks[] = { >> + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, >> + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, >> + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, >> + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, >> + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, >> + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, >> + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, >> + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, >> + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, >> + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, >> + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, >> + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, >> + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, >> + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, >> + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, >> + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, >> + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, >> + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, >> + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, >> + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, >> + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, >> + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, >> +}; >> + >> +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { >> + .clks = sm6125_clks, >> + .num_clks = ARRAY_SIZE(sm6125_clks), >> +}; >> + >> static const struct of_device_id rpm_smd_clk_match_table[] = { >> { .compatible = "qcom,rpmcc-msm8916", .data = >> &rpm_clk_msm8916 }, >> { .compatible = "qcom,rpmcc-msm8936", .data = >> &rpm_clk_msm8936 }, >> diff --git a/include/linux/soc/qcom/smd-rpm.h >> b/include/linux/soc/qcom/smd-rpm.h >> index f2645ec52520..b737d7e456e4 100644 >> --- a/include/linux/soc/qcom/smd-rpm.h >> +++ b/include/linux/soc/qcom/smd-rpm.h >> @@ -28,6 +28,7 @@ struct qcom_smd_rpm; >> #define QCOM_SMD_RPM_NCPA 0x6170636E >> #define QCOM_SMD_RPM_NCPB 0x6270636E >> #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f >> +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 >> #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 >> #define QCOM_SMD_RPM_SMPA 0x61706d73 >> #define QCOM_SMD_RPM_SMPB 0x62706d73 > > Two patches are adding this in different places. ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-07-30 20:20 ` Martin Botka @ 2021-07-30 20:23 ` Martin Botka 0 siblings, 0 replies; 14+ messages in thread From: Martin Botka @ 2021-07-30 20:23 UTC (permalink / raw) To: Stephen Boyd Cc: martin.botka1, ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Andy Gross, Bjorn Andersson, Michael Turquette, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Completely ignore it. Brain fart. On Fri, Jul 30 2021 at 10:20:11 PM +0200, Martin Botka <martin.botka@somainline.org> wrote: > Actually not all. > > On Tue, Jul 27 2021 at 02:46:39 PM -0700, Stephen Boyd > <sboyd@kernel.org> wrote: >> Quoting Martin Botka (2021-06-29 03:26:23) >>> diff --git a/drivers/clk/qcom/clk-smd-rpm.c >>> \x7f\x7fb/drivers/clk/qcom/clk-smd-rpm.c >>> index 8200c26b968c..51458f740ba0 100644 >>> --- a/drivers/clk/qcom/clk-smd-rpm.c >>> +++ b/drivers/clk/qcom/clk-smd-rpm.c >>> @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc >>> \x7f\x7frpm_clk_sdm660 = { >>> .num_clks = ARRAY_SIZE(sdm660_clks), >>> }; >>> >>> +/* SM6125 */ >>> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, >>> + QCOM_SMD_RPM_MISC_CLK, 0, >>> \x7f\x7f19200000); >>> +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_BUS_CLK, 1); >>> +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_MEM_CLK, 0); >> >> Can we use msm8916_bimc_clk? >> >>> +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_BUS_CLK, 2); >>> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, >>> + QCOM_SMD_RPM_MISC_CLK, 1, >>> \x7f\x7f19200000); >>> +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_CE_CLK, 0); >> >> Can we use msm8992_ce1_clk? >> >>> +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_IPA_CLK, 0); >> >> Can we use msm8976_ipa_clk? >> >>> +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_QUP_CLK, 0); >>> +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_MMAXI_CLK, 0); >>> +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, >>> \x7f\x7fQCOM_SMD_RPM_MMAXI_CLK, 1); >>> +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, >>> + >>> \x7f\x7fQCOM_SMD_RPM_BUS_CLK, 0); >>> +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, >>> + >>> \x7f\x7fQCOM_SMD_RPM_BUS_CLK, 5); >>> + >>> +/* SMD_XO_BUFFER */ >>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); >> >> msm8916? > > msm8916 one is not ln_. > >> >>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); >> >> msm8916? > > Same reason. > >> >>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); >> >> sdm660? >> >>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); >> >> msm8916? >> >>> +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); >> >> msm8916? >> >>> + >>> +static struct clk_smd_rpm *sm6125_clks[] = { >>> + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, >>> + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, >>> + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, >>> + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, >>> + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, >>> + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, >>> + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, >>> + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, >>> + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, >>> + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, >>> + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, >>> + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, >>> + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, >>> + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, >>> + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, >>> + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, >>> + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, >>> + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, >>> + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, >>> + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, >>> + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, >>> + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, >>> +}; >>> + >>> +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { >>> + .clks = sm6125_clks, >>> + .num_clks = ARRAY_SIZE(sm6125_clks), >>> +}; >>> + >>> static const struct of_device_id rpm_smd_clk_match_table[] = { >>> { .compatible = "qcom,rpmcc-msm8916", .data = >>> \x7f\x7f&rpm_clk_msm8916 }, >>> { .compatible = "qcom,rpmcc-msm8936", .data = >>> \x7f\x7f&rpm_clk_msm8936 }, >>> diff --git a/include/linux/soc/qcom/smd-rpm.h >>> \x7f\x7fb/include/linux/soc/qcom/smd-rpm.h >>> index f2645ec52520..b737d7e456e4 100644 >>> --- a/include/linux/soc/qcom/smd-rpm.h >>> +++ b/include/linux/soc/qcom/smd-rpm.h >>> @@ -28,6 +28,7 @@ struct qcom_smd_rpm; >>> #define QCOM_SMD_RPM_NCPA 0x6170636E >>> #define QCOM_SMD_RPM_NCPB 0x6270636E >>> #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f >>> +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 >>> #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 >>> #define QCOM_SMD_RPM_SMPA 0x61706d73 >>> #define QCOM_SMD_RPM_SMPB 0x62706d73 >> >> Two patches are adding this in different places. > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [RESEND PATCH v2 0/3] RPMCC for SM6125 2021-06-29 10:26 [RESEND PATCH v2 0/3] RPMCC for SM6125 Martin Botka ` (2 preceding siblings ...) 2021-06-29 10:26 ` [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 Martin Botka @ 2021-06-29 10:27 ` Martin Botka 3 siblings, 0 replies; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:27 UTC (permalink / raw) To: martin.botka1 Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel Sorry for sending it second time. Forgot to add To: as was previously asked ^ permalink raw reply [flat|nested] 14+ messages in thread
* [RESEND PATCH v2 0/3] RPMCC for SM6125 @ 2021-06-29 10:24 Martin Botka 2021-06-29 10:24 ` [RESEND PATCH v2 3/3] rpmcc: Add support " Martin Botka 0 siblings, 1 reply; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:24 UTC (permalink / raw) Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel This patch series adds support for the RPMCC found in SM6125 SoC. In this resend i didnt include 2 patches that were already merged. Changes in v2: Add commit description to all the patches Martin Botka (3): rpmcc: Add sm6125 compatible dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible rpmcc: Add support for SM6125 .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + drivers/clk/qcom/clk-smd-rpm.c | 56 +++++++++++++++++++ include/linux/soc/qcom/smd-rpm.h | 1 + 3 files changed, 58 insertions(+) -- 2.32.0 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 2021-06-29 10:24 Martin Botka @ 2021-06-29 10:24 ` Martin Botka 0 siblings, 0 replies; 14+ messages in thread From: Martin Botka @ 2021-06-29 10:24 UTC (permalink / raw) Cc: ~postmarketos/upstreaming, konrad.dybcio, angelogioacchino.delregno, marijn.suijten, jamipkettunen, paul.bouchara, Martin Botka, Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring, linux-arm-msm, linux-clk, devicetree, linux-kernel This commit adds support for RPM clocks found in SM6125 SoC Signed-off-by: Martin Botka <martin.botka@somainline.org> --- drivers/clk/qcom/clk-smd-rpm.c | 55 ++++++++++++++++++++++++++++++++ include/linux/soc/qcom/smd-rpm.h | 1 + 2 files changed, 56 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 8200c26b968c..51458f740ba0 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -1059,6 +1059,61 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { .num_clks = ARRAY_SIZE(sdm660_clks), }; +/* SM6125 */ +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, bi_tcxo, bi_tcxo_ao, + QCOM_SMD_RPM_MISC_CLK, 0, 19200000); +DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); +DEFINE_CLK_SMD_RPM(sm6125, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2); +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, + QCOM_SMD_RPM_MISC_CLK, 1, 19200000); +DEFINE_CLK_SMD_RPM(sm6125, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1); +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, + QCOM_SMD_RPM_BUS_CLK, 0); +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, + QCOM_SMD_RPM_BUS_CLK, 5); + +/* SMD_XO_BUFFER */ +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk1, ln_bb_clk1_a, 1); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk2, ln_bb_clk2_a, 2); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, ln_bb_clk3, ln_bb_clk3_a, 3); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk1, rf_clk1_a, 4); +DEFINE_CLK_SMD_RPM_XO_BUFFER(sm6125, rf_clk2, rf_clk2_a, 5); + +static struct clk_smd_rpm *sm6125_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &sm6125_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &sm6125_bi_tcxo_ao, + [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk, + [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk, + [RPM_SMD_BIMC_CLK] = &sm6125_bimc_clk, + [RPM_SMD_BIMC_A_CLK] = &sm6125_bimc_a_clk, + [RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk, + [RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk, + [RPM_SMD_RF_CLK1] = &sm6125_rf_clk1, + [RPM_SMD_RF_CLK1_A] = &sm6125_rf_clk1_a, + [RPM_SMD_RF_CLK2] = &sm6125_rf_clk2, + [RPM_SMD_RF_CLK2_A] = &sm6125_rf_clk2_a, + [RPM_SMD_LN_BB_CLK1] = &sm6125_ln_bb_clk1, + [RPM_SMD_LN_BB_CLK1_A] = &sm6125_ln_bb_clk1_a, + [RPM_SMD_LN_BB_CLK2] = &sm6125_ln_bb_clk2, + [RPM_SMD_LN_BB_CLK2_A] = &sm6125_ln_bb_clk2_a, + [RPM_SMD_LN_BB_CLK3] = &sm6125_ln_bb_clk3, + [RPM_SMD_LN_BB_CLK3_A] = &sm6125_ln_bb_clk3_a, + [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk, + [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk, + [RPM_SMD_CE1_CLK] = &sm6125_ce1_clk, + [RPM_SMD_CE1_A_CLK] = &sm6125_ce1_a_clk, +}; + +static const struct rpm_smd_clk_desc rpm_clk_sm6125 = { + .clks = sm6125_clks, + .num_clks = ARRAY_SIZE(sm6125_clks), +}; + static const struct of_device_id rpm_smd_clk_match_table[] = { { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 }, diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index f2645ec52520..b737d7e456e4 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -28,6 +28,7 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_NCPA 0x6170636E #define QCOM_SMD_RPM_NCPB 0x6270636E #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f +#define QCOM_SMD_RPM_QUP_CLK 0x00707571 #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 #define QCOM_SMD_RPM_SMPA 0x61706d73 #define QCOM_SMD_RPM_SMPB 0x62706d73 -- 2.32.0 ^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-07-30 20:24 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-29 10:26 [RESEND PATCH v2 0/3] RPMCC for SM6125 Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 1/3] rpmcc: Add sm6125 compatible Martin Botka 2021-07-27 21:47 ` Stephen Boyd 2021-07-30 20:07 ` Martin Botka 2021-06-29 10:26 ` [RESEND PATCH v2 2/3] dt-bindings: clk: qcom: smd-rpm: Document SM6125 compatible Martin Botka 2021-07-14 21:08 ` Rob Herring 2021-07-27 21:48 ` Stephen Boyd 2021-06-29 10:26 ` [RESEND PATCH v2 3/3] rpmcc: Add support for SM6125 Martin Botka 2021-07-27 21:46 ` Stephen Boyd 2021-07-30 20:07 ` Martin Botka 2021-07-30 20:20 ` Martin Botka 2021-07-30 20:23 ` Martin Botka 2021-06-29 10:27 ` [RESEND PATCH v2 0/3] RPMCC " Martin Botka -- strict thread matches above, loose matches on Subject: below -- 2021-06-29 10:24 Martin Botka 2021-06-29 10:24 ` [RESEND PATCH v2 3/3] rpmcc: Add support " Martin Botka
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