From: Will Deacon <will.deacon@arm.com>
To: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
Dave P Martin <Dave.Martin@arm.com>,
Catalin Marinas <Catalin.Marinas@arm.com>,
Marc Zyngier <Marc.Zyngier@arm.com>,
Mark Rutland <Mark.Rutland@arm.com>,
Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>,
Russell King <linux@arm.linux.org.uk>,
Colin Cross <ccross@android.com>, Yu Tang <ytang5@marvell.com>,
Zhou Zhu <zzhu3@marvell.com>,
"ksankaran@apm.com" <ksankaran@apm.com>, Loc Ho <lho@apm.com>,
Feng Kan <fkan@apm.com>, Nicolas Pitre <nico@linaro.org>,
Santosh Shilimkar <santosh.shilimkar@ti.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Graeme Gregory <graeme.gregory@linaro.org>,
Hanjun Guo <hanjun.guo@linaro.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [PATCH RFC v3 08/12] arm64: kernel: implement HW breakpoints CPU PM notifier
Date: Fri, 20 Dec 2013 17:29:07 +0000 [thread overview]
Message-ID: <20131220172907.GF16829@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1385033059-25896-9-git-send-email-lorenzo.pieralisi@arm.com>
Hi Lorenzo,
On Thu, Nov 21, 2013 at 11:24:15AM +0000, Lorenzo Pieralisi wrote:
> When a CPU is shutdown either through CPU idle or suspend to RAM, the
> content of HW breakpoint registers must be reset or restored to proper
> values when CPU resume from low power states. This patch adds debug register
> restore operations to the HW breakpoint control function and implements a
> CPU PM notifier that allows to restore the content of HW breakpoint registers
> to allow proper suspend/resume operations.
This looks mostly fine to me, but I have one questions you might be able to
answer...
> @@ -840,18 +847,36 @@ void hw_breakpoint_thread_switch(struct task_struct *next)
> /*
> * CPU initialisation.
> */
> -static void reset_ctrl_regs(void *unused)
> +static void hw_breakpoint_reset(void *unused)
> {
> int i;
> -
> - for (i = 0; i < core_num_brps; ++i) {
> - write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL);
> - write_wb_reg(AARCH64_DBG_REG_BVR, i, 0UL);
> + struct perf_event **slots;
> + /*
> + * When a CPU goes through cold-boot, it does not have any installed
> + * slot, so it is safe to share the same function for restoring and
> + * resetting breakpoints; when a CPU is hotplugged in, it goes
> + * through the slots, which are all empty, hence it just resets control
> + * and value for debug registers.
> + * When this function is triggered on warm-boot through a CPU PM
> + * notifier some slots might be initialized; if so they are
> + * reprogrammed according to the debug slots content.
> + */
> + for (slots = this_cpu_ptr(bp_on_reg), i = 0; i < core_num_brps; ++i) {
> + if (slots[i]) {
> + hw_breakpoint_control(slots[i], HW_BREAKPOINT_RESTORE);
> + } else {
> + write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL);
> + write_wb_reg(AARCH64_DBG_REG_BVR, i, 0UL);
> + }
When this runs on warm-boot and starts restoring debug state, are debug
exceptions guaranteed to be masked? I think that the debug restoration
should appear atomic to a debugger (i.e. you can't take a debug exception
half-way through the restore).
Providing that's the case:
Acked-by: Will Deacon <will.deacon@arm.com>
Will
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC v3 08/12] arm64: kernel: implement HW breakpoints CPU PM notifier
Date: Fri, 20 Dec 2013 17:29:07 +0000 [thread overview]
Message-ID: <20131220172907.GF16829@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1385033059-25896-9-git-send-email-lorenzo.pieralisi@arm.com>
Hi Lorenzo,
On Thu, Nov 21, 2013 at 11:24:15AM +0000, Lorenzo Pieralisi wrote:
> When a CPU is shutdown either through CPU idle or suspend to RAM, the
> content of HW breakpoint registers must be reset or restored to proper
> values when CPU resume from low power states. This patch adds debug register
> restore operations to the HW breakpoint control function and implements a
> CPU PM notifier that allows to restore the content of HW breakpoint registers
> to allow proper suspend/resume operations.
This looks mostly fine to me, but I have one questions you might be able to
answer...
> @@ -840,18 +847,36 @@ void hw_breakpoint_thread_switch(struct task_struct *next)
> /*
> * CPU initialisation.
> */
> -static void reset_ctrl_regs(void *unused)
> +static void hw_breakpoint_reset(void *unused)
> {
> int i;
> -
> - for (i = 0; i < core_num_brps; ++i) {
> - write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL);
> - write_wb_reg(AARCH64_DBG_REG_BVR, i, 0UL);
> + struct perf_event **slots;
> + /*
> + * When a CPU goes through cold-boot, it does not have any installed
> + * slot, so it is safe to share the same function for restoring and
> + * resetting breakpoints; when a CPU is hotplugged in, it goes
> + * through the slots, which are all empty, hence it just resets control
> + * and value for debug registers.
> + * When this function is triggered on warm-boot through a CPU PM
> + * notifier some slots might be initialized; if so they are
> + * reprogrammed according to the debug slots content.
> + */
> + for (slots = this_cpu_ptr(bp_on_reg), i = 0; i < core_num_brps; ++i) {
> + if (slots[i]) {
> + hw_breakpoint_control(slots[i], HW_BREAKPOINT_RESTORE);
> + } else {
> + write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL);
> + write_wb_reg(AARCH64_DBG_REG_BVR, i, 0UL);
> + }
When this runs on warm-boot and starts restoring debug state, are debug
exceptions guaranteed to be masked? I think that the debug restoration
should appear atomic to a debugger (i.e. you can't take a debug exception
half-way through the restore).
Providing that's the case:
Acked-by: Will Deacon <will.deacon@arm.com>
Will
next prev parent reply other threads:[~2013-12-20 17:29 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-21 11:24 [PATCH RFC v3 00/12] arm64: suspend/resume implementation Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 01/12] arm64: kernel: add MPIDR_EL1 accessors macros Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 02/12] arm64: kernel: build MPIDR_EL1 hash function data structure Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 03/12] arm64: kernel: suspend/resume registers save/restore Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 04/12] arm64: kernel: cpu_{suspend/resume} implementation Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-12-20 11:30 ` Leo Yan
2013-12-20 11:30 ` Leo Yan
2013-12-20 11:57 ` Catalin Marinas
2013-12-20 11:57 ` Catalin Marinas
2013-12-23 14:04 ` Lorenzo Pieralisi
2013-12-23 14:04 ` Lorenzo Pieralisi
2013-12-24 6:18 ` Leo Yan
2013-12-24 6:18 ` Leo Yan
2013-11-21 11:24 ` [PATCH RFC v3 05/12] arm64: kernel: implement fpsimd CPU PM notifier Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 06/12] arm: kvm: implement " Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-27 3:02 ` Christoffer Dall
2013-11-27 3:02 ` Christoffer Dall
2013-11-21 11:24 ` [PATCH RFC v3 07/12] arm64: kernel: refactor code to install/uninstall breakpoints Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 08/12] arm64: kernel: implement HW breakpoints CPU PM notifier Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-12-20 17:29 ` Will Deacon [this message]
2013-12-20 17:29 ` Will Deacon
2013-12-23 13:50 ` Lorenzo Pieralisi
2013-12-23 13:50 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 09/12] arm64: enable generic clockevent broadcast Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 10/12] arm64: kernel: add CPU idle call Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 11/12] arm64: kernel: add PM build infrastructure Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
2013-11-21 11:24 ` [PATCH RFC v3 12/12] arm64: add CPU power management menu/entries Lorenzo Pieralisi
2013-11-21 11:24 ` Lorenzo Pieralisi
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