[PATCH] arm: dts: dra7: arch timer sits in always-on power domain

From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm: dts: dra7: arch timer sits in always-on power domain
Date: Wed, 15 Jul 2015 10:24:37 +0100	[thread overview]
Message-ID: <20150715092437.GC9627@leverpostej> (raw)
In-Reply-To: <1436820101-2172-1-git-send-email-balbi@ti.com>

On Mon, Jul 13, 2015 at 09:41:41PM +0100, Felipe Balbi wrote:
> According to DRA7x TRM section 4.3.5 Realtime Counter (Master Counter),
> the realtime counter sits in the Wakeup Always-On Power domain.
> Furthermore, the counter will automatically switch the 32K clock source
> when MPU goes into standby and automatically switch back to SYS_CLK or
> ABE_LP when MPU goes out of standby.

While the counter is in an always-on domain (the architecture mandates
this) I don't think that applies to the timers (i.e. the comparators
within a CPU), which are almost certainly not in an always-on domain.

I suspect that this is incorrect, and it will be very painful to debug
if it is...

Thanks,
Mark.

> 
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
>  arch/arm/boot/dts/dra7.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 8f1e25bcecbd..c1e6fd82485f 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -50,6 +50,7 @@
>  			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
>  			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
>  		interrupt-parent = <&gic>;
> +		always-on;
>  	};
>  
>  	gic: interrupt-controller at 48211000 {
> -- 
> 2.4.4
> 
> 
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