diff for duplicates of <20171029231123.27281-11-shorne@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 77db937..5a1d19c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,7 +6,7 @@ SMP. This also supports our base FPGA SoC's if the cpu frequency is upped to 50Mhz. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> -[shorne@gmail.com: Added defconfig] +[shorne at gmail.com: Added defconfig] Signed-off-by: Stafford Horne <shorne@gmail.com> --- @@ -49,7 +49,7 @@ index 000000000000..defbb92714ec + stdout-path = "uart0:115200"; + }; + -+ memory@0 { ++ memory at 0 { + device_type = "memory"; + reg = <0x00000000 0x02000000>; + }; @@ -57,19 +57,19 @@ index 000000000000..defbb92714ec + cpus { + #address-cells = <1>; + #size-cells = <0>; -+ cpu@0 { ++ cpu at 0 { + compatible = "opencores,or1200-rtlsvn481"; + reg = <0>; + clock-frequency = <20000000>; + }; -+ cpu@1 { ++ cpu at 1 { + compatible = "opencores,or1200-rtlsvn481"; + reg = <1>; + clock-frequency = <20000000>; + }; + }; + -+ ompic: ompic@98000000 { ++ ompic: ompic at 98000000 { + compatible = "openrisc,ompic"; + reg = <0x98000000 16>; + interrupt-controller; @@ -88,7 +88,7 @@ index 000000000000..defbb92714ec + interrupt-controller; + }; + -+ serial0: serial@90000000 { ++ serial0: serial at 90000000 { + compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; + reg = <0x90000000 0x100>; + interrupts = <2>; diff --git a/a/content_digest b/N1/content_digest index 32fbaeb..bdf3e39 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -5,23 +5,13 @@ "From\0Stafford Horne <shorne\@gmail.com>\0" ] [ - "Subject\0[PATCH v4 10/13] openrisc: add simple_smp dts and defconfig for simulators\0" + "Subject\0[OpenRISC] [PATCH v4 10/13] openrisc: add simple_smp dts and defconfig for simulators\0" ] [ "Date\0Mon, 30 Oct 2017 08:11:20 +0900\0" ] [ - "To\0LKML <linux-kernel\@vger.kernel.org>\0" -] -[ - "Cc\0Stefan Kristiansson <stefan.kristiansson\@saunalahti.fi>", - " Stafford Horne <shorne\@gmail.com>", - " Rob Herring <robh+dt\@kernel.org>", - " Mark Rutland <mark.rutland\@arm.com>", - " Jonas Bonn <jonas\@southpole.se>", - " Krzysztof Kozlowski <krzk\@kernel.org>", - " devicetree\@vger.kernel.org", - " openrisc\@lists.librecores.org\0" + "To\0openrisc\@lists.librecores.org\0" ] [ "\0000:1\0" @@ -38,7 +28,7 @@ "upped to 50Mhz.\n", "\n", "Signed-off-by: Stefan Kristiansson <stefan.kristiansson\@saunalahti.fi>\n", - "[shorne\@gmail.com: Added defconfig]\n", + "[shorne at gmail.com: Added defconfig]\n", "Signed-off-by: Stafford Horne <shorne\@gmail.com>\n", "---\n", "\n", @@ -81,7 +71,7 @@ "+\t\tstdout-path = \"uart0:115200\";\n", "+\t};\n", "+\n", - "+\tmemory\@0 {\n", + "+\tmemory at 0 {\n", "+\t\tdevice_type = \"memory\";\n", "+\t\treg = <0x00000000 0x02000000>;\n", "+\t};\n", @@ -89,19 +79,19 @@ "+\tcpus {\n", "+\t\t#address-cells = <1>;\n", "+\t\t#size-cells = <0>;\n", - "+\t\tcpu\@0 {\n", + "+\t\tcpu at 0 {\n", "+\t\t\tcompatible = \"opencores,or1200-rtlsvn481\";\n", "+\t\t\treg = <0>;\n", "+\t\t\tclock-frequency = <20000000>;\n", "+\t\t};\n", - "+\t\tcpu\@1 {\n", + "+\t\tcpu at 1 {\n", "+\t\t\tcompatible = \"opencores,or1200-rtlsvn481\";\n", "+\t\t\treg = <1>;\n", "+\t\t\tclock-frequency = <20000000>;\n", "+\t\t};\n", "+\t};\n", "+\n", - "+\tompic: ompic\@98000000 {\n", + "+\tompic: ompic at 98000000 {\n", "+\t\tcompatible = \"openrisc,ompic\";\n", "+\t\treg = <0x98000000 16>;\n", "+\t\tinterrupt-controller;\n", @@ -120,7 +110,7 @@ "+\t\tinterrupt-controller;\n", "+\t};\n", "+\n", - "+\tserial0: serial\@90000000 {\n", + "+\tserial0: serial at 90000000 {\n", "+\t\tcompatible = \"opencores,uart16550-rtlsvn105\", \"ns16550a\";\n", "+\t\treg = <0x90000000 0x100>;\n", "+\t\tinterrupts = <2>;\n", @@ -204,4 +194,4 @@ "2.13.6" ] -2d2e174a93c03779c9fe48f0f9acb92c3ff97d7d460018f18e65a59c82230b74 +55bb70a8655c8b4b6b39aee78fba134d7698255bb8180dd1e08970feedfda7af
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