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From: Stephen Rothwell <sfr@canb.auug.org.au>
To: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics <intel-gfx@lists.freedesktop.org>,
	DRI <dri-devel@lists.freedesktop.org>,
	Dave Airlie <airlied@linux.ie>
Cc: "Alex Deucher" <alexdeucher@gmail.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Felix Kuehling" <Felix.Kuehling@amd.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Linux Next Mailing List" <linux-next@vger.kernel.org>,
	"Nirmoy Das" <nirmoy.das@amd.com>
Subject: Re: linux-next: manual merge of the amdgpu tree with the drm-misc tree
Date: Fri, 4 Jun 2021 12:33:09 +1000	[thread overview]
Message-ID: <20210604123309.2e5b546a@canb.auug.org.au> (raw)
In-Reply-To: <20210603124847.19a6dacf@canb.auug.org.au>

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Hi all,

On Thu, 3 Jun 2021 12:48:47 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the amdgpu tree got conflicts in:
> 
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> 
> between commit:
> 
>   d3116756a710 ("drm/ttm: rename bo->mem and make it a pointer")
> 
> from the drm-misc tree and commits:
> 
>   b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs")
>   2a675640bc2d ("drm/amdgpu: move shadow bo validation to VM code")
>   59276f056fb7 ("drm/amdgpu: switch to amdgpu_bo_vm for vm code")
>   19a1d9350be6 ("drm/amdgpu: flush gart changes after all BO recovery")
> 
> from the amdgpu tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 663aa7d2e2ea,86259435803e..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@@ -459,10 -479,11 +461,11 @@@ static int amdgpu_bo_move(struct ttm_bu
>   {
>   	struct amdgpu_device *adev;
>   	struct amdgpu_bo *abo;
>  -	struct ttm_resource *old_mem = &bo->mem;
>  +	struct ttm_resource *old_mem = bo->resource;
>   	int r;
>   
> - 	if (new_mem->mem_type == TTM_PL_TT) {
> + 	if (new_mem->mem_type == TTM_PL_TT ||
> + 	    new_mem->mem_type == AMDGPU_PL_PREEMPT) {
>   		r = amdgpu_ttm_backend_bind(bo->bdev, bo->ttm, new_mem);
>   		if (r)
>   			return r;
> @@@ -989,8 -1012,9 +995,9 @@@ int amdgpu_ttm_alloc_gart(struct ttm_bu
>   			return r;
>   		}
>   
> + 		amdgpu_gart_invalidate_tlb(adev);
>  -		ttm_resource_free(bo, &bo->mem);
>  -		bo->mem = tmp;
>  +		ttm_resource_free(bo, bo->resource);
>  +		ttm_bo_assign_mem(bo, &tmp);
>   	}
>   
>   	return 0;
> @@@ -1348,7 -1373,16 +1356,16 @@@ static bool amdgpu_ttm_bo_eviction_valu
>   		}
>   	}
>   
>  -	switch (bo->mem.mem_type) {
>  +	switch (bo->resource->mem_type) {
> + 	case AMDGPU_PL_PREEMPT:
> + 		/* Preemptible BOs don't own system resources managed by the
> + 		 * driver (pages, VRAM, GART space). They point to resources
> + 		 * owned by someone else (e.g. pageable memory in user mode
> + 		 * or a DMABuf). They are used in a preemptible context so we
> + 		 * can guarantee no deadlocks and good QoS in case of MMU
> + 		 * notifiers or DMABuf move notifiers from the resource owner.
> + 		 */
> + 		return false;
>   	case TTM_PL_TT:
>   		if (amdgpu_bo_is_amdgpu_bo(bo) &&
>   		    amdgpu_bo_encrypted(ttm_to_amdgpu_bo(bo)))
> @@@ -1767,8 -1809,13 +1791,9 @@@ void amdgpu_ttm_fini(struct amdgpu_devi
>   	amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
>   	amdgpu_ttm_fw_reserve_vram_fini(adev);
>   
>  -	if (adev->mman.aper_base_kaddr)
>  -		iounmap(adev->mman.aper_base_kaddr);
>  -	adev->mman.aper_base_kaddr = NULL;
>  -
>   	amdgpu_vram_mgr_fini(adev);
>   	amdgpu_gtt_mgr_fini(adev);
> + 	amdgpu_preempt_mgr_fini(adev);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
> @@@ -1919,7 -2010,12 +1944,12 @@@ int amdgpu_fill_buffer(struct amdgpu_b
>   		return -EINVAL;
>   	}
>   
>  -	if (bo->tbo.mem.mem_type == AMDGPU_PL_PREEMPT) {
> ++	if (bo->tbo.resource->mem_type == AMDGPU_PL_PREEMPT) {
> + 		DRM_ERROR("Trying to clear preemptible memory.\n");
> + 		return -EINVAL;
> + 	}
> + 
>  -	if (bo->tbo.mem.mem_type == TTM_PL_TT) {
>  +	if (bo->tbo.resource->mem_type == TTM_PL_TT) {
>   		r = amdgpu_ttm_alloc_gart(&bo->tbo);
>   		if (r)
>   			return r;
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bcfd4a8d0288,1923f035713a..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@@ -657,11 -657,10 +658,11 @@@ void amdgpu_vm_move_to_lru_tail(struct 
>   		if (!bo->parent)
>   			continue;
>   
>  -		ttm_bo_move_to_lru_tail(&bo->tbo, &bo->tbo.mem,
>  +		ttm_bo_move_to_lru_tail(&bo->tbo, bo->tbo.resource,
>   					&vm->lru_bulk_move);
> - 		if (bo->shadow)
> - 			ttm_bo_move_to_lru_tail(&bo->shadow->tbo,
> + 		if (shadow)
>  -			ttm_bo_move_to_lru_tail(&shadow->tbo, &shadow->tbo.mem,
> ++			ttm_bo_move_to_lru_tail(&shadow->tbo,
>  +						shadow->tbo.resource,
>   						&vm->lru_bulk_move);
>   	}
>   	spin_unlock(&adev->mman.bdev.lru_lock);
> @@@ -1818,11 -1853,12 +1859,12 @@@ int amdgpu_vm_bo_update(struct amdgpu_d
>   			struct drm_gem_object *gobj = dma_buf->priv;
>   			struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
>   
>  -			if (abo->tbo.mem.mem_type == TTM_PL_VRAM)
>  +			if (abo->tbo.resource->mem_type == TTM_PL_VRAM)
>   				bo = gem_to_amdgpu_bo(gobj);
>   		}
>  -		mem = &bo->tbo.mem;
>  +		mem = bo->tbo.resource;
> - 		if (mem->mem_type == TTM_PL_TT)
> + 		if (mem->mem_type == TTM_PL_TT ||
> + 		    mem->mem_type == AMDGPU_PL_PREEMPT)
>   			pages_addr = bo->tbo.ttm->dma_address;
>   	}
>   

This is now a conflict between the drm-misc tree and the drm tree.

(I fixed up the resolution above)

-- 
Cheers,
Stephen Rothwell

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WARNING: multiple messages have this Message-ID (diff)
From: Stephen Rothwell <sfr@canb.auug.org.au>
To: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics <intel-gfx@lists.freedesktop.org>,
	DRI <dri-devel@lists.freedesktop.org>,
	Dave Airlie <airlied@linux.ie>
Cc: "Felix Kuehling" <Felix.Kuehling@amd.com>,
	"Nirmoy Das" <nirmoy.das@amd.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Linux Next Mailing List" <linux-next@vger.kernel.org>,
	"Alex Deucher" <alexdeucher@gmail.com>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [Intel-gfx] linux-next: manual merge of the amdgpu tree with the drm-misc tree
Date: Fri, 4 Jun 2021 12:33:09 +1000	[thread overview]
Message-ID: <20210604123309.2e5b546a@canb.auug.org.au> (raw)
In-Reply-To: <20210603124847.19a6dacf@canb.auug.org.au>


[-- Attachment #1.1: Type: text/plain, Size: 5556 bytes --]

Hi all,

On Thu, 3 Jun 2021 12:48:47 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the amdgpu tree got conflicts in:
> 
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> 
> between commit:
> 
>   d3116756a710 ("drm/ttm: rename bo->mem and make it a pointer")
> 
> from the drm-misc tree and commits:
> 
>   b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs")
>   2a675640bc2d ("drm/amdgpu: move shadow bo validation to VM code")
>   59276f056fb7 ("drm/amdgpu: switch to amdgpu_bo_vm for vm code")
>   19a1d9350be6 ("drm/amdgpu: flush gart changes after all BO recovery")
> 
> from the amdgpu tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 663aa7d2e2ea,86259435803e..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@@ -459,10 -479,11 +461,11 @@@ static int amdgpu_bo_move(struct ttm_bu
>   {
>   	struct amdgpu_device *adev;
>   	struct amdgpu_bo *abo;
>  -	struct ttm_resource *old_mem = &bo->mem;
>  +	struct ttm_resource *old_mem = bo->resource;
>   	int r;
>   
> - 	if (new_mem->mem_type == TTM_PL_TT) {
> + 	if (new_mem->mem_type == TTM_PL_TT ||
> + 	    new_mem->mem_type == AMDGPU_PL_PREEMPT) {
>   		r = amdgpu_ttm_backend_bind(bo->bdev, bo->ttm, new_mem);
>   		if (r)
>   			return r;
> @@@ -989,8 -1012,9 +995,9 @@@ int amdgpu_ttm_alloc_gart(struct ttm_bu
>   			return r;
>   		}
>   
> + 		amdgpu_gart_invalidate_tlb(adev);
>  -		ttm_resource_free(bo, &bo->mem);
>  -		bo->mem = tmp;
>  +		ttm_resource_free(bo, bo->resource);
>  +		ttm_bo_assign_mem(bo, &tmp);
>   	}
>   
>   	return 0;
> @@@ -1348,7 -1373,16 +1356,16 @@@ static bool amdgpu_ttm_bo_eviction_valu
>   		}
>   	}
>   
>  -	switch (bo->mem.mem_type) {
>  +	switch (bo->resource->mem_type) {
> + 	case AMDGPU_PL_PREEMPT:
> + 		/* Preemptible BOs don't own system resources managed by the
> + 		 * driver (pages, VRAM, GART space). They point to resources
> + 		 * owned by someone else (e.g. pageable memory in user mode
> + 		 * or a DMABuf). They are used in a preemptible context so we
> + 		 * can guarantee no deadlocks and good QoS in case of MMU
> + 		 * notifiers or DMABuf move notifiers from the resource owner.
> + 		 */
> + 		return false;
>   	case TTM_PL_TT:
>   		if (amdgpu_bo_is_amdgpu_bo(bo) &&
>   		    amdgpu_bo_encrypted(ttm_to_amdgpu_bo(bo)))
> @@@ -1767,8 -1809,13 +1791,9 @@@ void amdgpu_ttm_fini(struct amdgpu_devi
>   	amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
>   	amdgpu_ttm_fw_reserve_vram_fini(adev);
>   
>  -	if (adev->mman.aper_base_kaddr)
>  -		iounmap(adev->mman.aper_base_kaddr);
>  -	adev->mman.aper_base_kaddr = NULL;
>  -
>   	amdgpu_vram_mgr_fini(adev);
>   	amdgpu_gtt_mgr_fini(adev);
> + 	amdgpu_preempt_mgr_fini(adev);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
> @@@ -1919,7 -2010,12 +1944,12 @@@ int amdgpu_fill_buffer(struct amdgpu_b
>   		return -EINVAL;
>   	}
>   
>  -	if (bo->tbo.mem.mem_type == AMDGPU_PL_PREEMPT) {
> ++	if (bo->tbo.resource->mem_type == AMDGPU_PL_PREEMPT) {
> + 		DRM_ERROR("Trying to clear preemptible memory.\n");
> + 		return -EINVAL;
> + 	}
> + 
>  -	if (bo->tbo.mem.mem_type == TTM_PL_TT) {
>  +	if (bo->tbo.resource->mem_type == TTM_PL_TT) {
>   		r = amdgpu_ttm_alloc_gart(&bo->tbo);
>   		if (r)
>   			return r;
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bcfd4a8d0288,1923f035713a..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@@ -657,11 -657,10 +658,11 @@@ void amdgpu_vm_move_to_lru_tail(struct 
>   		if (!bo->parent)
>   			continue;
>   
>  -		ttm_bo_move_to_lru_tail(&bo->tbo, &bo->tbo.mem,
>  +		ttm_bo_move_to_lru_tail(&bo->tbo, bo->tbo.resource,
>   					&vm->lru_bulk_move);
> - 		if (bo->shadow)
> - 			ttm_bo_move_to_lru_tail(&bo->shadow->tbo,
> + 		if (shadow)
>  -			ttm_bo_move_to_lru_tail(&shadow->tbo, &shadow->tbo.mem,
> ++			ttm_bo_move_to_lru_tail(&shadow->tbo,
>  +						shadow->tbo.resource,
>   						&vm->lru_bulk_move);
>   	}
>   	spin_unlock(&adev->mman.bdev.lru_lock);
> @@@ -1818,11 -1853,12 +1859,12 @@@ int amdgpu_vm_bo_update(struct amdgpu_d
>   			struct drm_gem_object *gobj = dma_buf->priv;
>   			struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
>   
>  -			if (abo->tbo.mem.mem_type == TTM_PL_VRAM)
>  +			if (abo->tbo.resource->mem_type == TTM_PL_VRAM)
>   				bo = gem_to_amdgpu_bo(gobj);
>   		}
>  -		mem = &bo->tbo.mem;
>  +		mem = bo->tbo.resource;
> - 		if (mem->mem_type == TTM_PL_TT)
> + 		if (mem->mem_type == TTM_PL_TT ||
> + 		    mem->mem_type == AMDGPU_PL_PREEMPT)
>   			pages_addr = bo->tbo.ttm->dma_address;
>   	}
>   

This is now a conflict between the drm-misc tree and the drm tree.

(I fixed up the resolution above)

-- 
Cheers,
Stephen Rothwell

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_______________________________________________
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Intel-gfx@lists.freedesktop.org
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WARNING: multiple messages have this Message-ID (diff)
From: Stephen Rothwell <sfr@canb.auug.org.au>
To: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics <intel-gfx@lists.freedesktop.org>,
	DRI <dri-devel@lists.freedesktop.org>,
	Dave Airlie <airlied@linux.ie>
Cc: "Felix Kuehling" <Felix.Kuehling@amd.com>,
	"Nirmoy Das" <nirmoy.das@amd.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Linux Next Mailing List" <linux-next@vger.kernel.org>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: linux-next: manual merge of the amdgpu tree with the drm-misc tree
Date: Fri, 4 Jun 2021 12:33:09 +1000	[thread overview]
Message-ID: <20210604123309.2e5b546a@canb.auug.org.au> (raw)
In-Reply-To: <20210603124847.19a6dacf@canb.auug.org.au>

[-- Attachment #1: Type: text/plain, Size: 5556 bytes --]

Hi all,

On Thu, 3 Jun 2021 12:48:47 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the amdgpu tree got conflicts in:
> 
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> 
> between commit:
> 
>   d3116756a710 ("drm/ttm: rename bo->mem and make it a pointer")
> 
> from the drm-misc tree and commits:
> 
>   b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs")
>   2a675640bc2d ("drm/amdgpu: move shadow bo validation to VM code")
>   59276f056fb7 ("drm/amdgpu: switch to amdgpu_bo_vm for vm code")
>   19a1d9350be6 ("drm/amdgpu: flush gart changes after all BO recovery")
> 
> from the amdgpu tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> -- 
> Cheers,
> Stephen Rothwell
> 
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 663aa7d2e2ea,86259435803e..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@@ -459,10 -479,11 +461,11 @@@ static int amdgpu_bo_move(struct ttm_bu
>   {
>   	struct amdgpu_device *adev;
>   	struct amdgpu_bo *abo;
>  -	struct ttm_resource *old_mem = &bo->mem;
>  +	struct ttm_resource *old_mem = bo->resource;
>   	int r;
>   
> - 	if (new_mem->mem_type == TTM_PL_TT) {
> + 	if (new_mem->mem_type == TTM_PL_TT ||
> + 	    new_mem->mem_type == AMDGPU_PL_PREEMPT) {
>   		r = amdgpu_ttm_backend_bind(bo->bdev, bo->ttm, new_mem);
>   		if (r)
>   			return r;
> @@@ -989,8 -1012,9 +995,9 @@@ int amdgpu_ttm_alloc_gart(struct ttm_bu
>   			return r;
>   		}
>   
> + 		amdgpu_gart_invalidate_tlb(adev);
>  -		ttm_resource_free(bo, &bo->mem);
>  -		bo->mem = tmp;
>  +		ttm_resource_free(bo, bo->resource);
>  +		ttm_bo_assign_mem(bo, &tmp);
>   	}
>   
>   	return 0;
> @@@ -1348,7 -1373,16 +1356,16 @@@ static bool amdgpu_ttm_bo_eviction_valu
>   		}
>   	}
>   
>  -	switch (bo->mem.mem_type) {
>  +	switch (bo->resource->mem_type) {
> + 	case AMDGPU_PL_PREEMPT:
> + 		/* Preemptible BOs don't own system resources managed by the
> + 		 * driver (pages, VRAM, GART space). They point to resources
> + 		 * owned by someone else (e.g. pageable memory in user mode
> + 		 * or a DMABuf). They are used in a preemptible context so we
> + 		 * can guarantee no deadlocks and good QoS in case of MMU
> + 		 * notifiers or DMABuf move notifiers from the resource owner.
> + 		 */
> + 		return false;
>   	case TTM_PL_TT:
>   		if (amdgpu_bo_is_amdgpu_bo(bo) &&
>   		    amdgpu_bo_encrypted(ttm_to_amdgpu_bo(bo)))
> @@@ -1767,8 -1809,13 +1791,9 @@@ void amdgpu_ttm_fini(struct amdgpu_devi
>   	amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
>   	amdgpu_ttm_fw_reserve_vram_fini(adev);
>   
>  -	if (adev->mman.aper_base_kaddr)
>  -		iounmap(adev->mman.aper_base_kaddr);
>  -	adev->mman.aper_base_kaddr = NULL;
>  -
>   	amdgpu_vram_mgr_fini(adev);
>   	amdgpu_gtt_mgr_fini(adev);
> + 	amdgpu_preempt_mgr_fini(adev);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GWS);
>   	ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_OA);
> @@@ -1919,7 -2010,12 +1944,12 @@@ int amdgpu_fill_buffer(struct amdgpu_b
>   		return -EINVAL;
>   	}
>   
>  -	if (bo->tbo.mem.mem_type == AMDGPU_PL_PREEMPT) {
> ++	if (bo->tbo.resource->mem_type == AMDGPU_PL_PREEMPT) {
> + 		DRM_ERROR("Trying to clear preemptible memory.\n");
> + 		return -EINVAL;
> + 	}
> + 
>  -	if (bo->tbo.mem.mem_type == TTM_PL_TT) {
>  +	if (bo->tbo.resource->mem_type == TTM_PL_TT) {
>   		r = amdgpu_ttm_alloc_gart(&bo->tbo);
>   		if (r)
>   			return r;
> diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bcfd4a8d0288,1923f035713a..000000000000
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@@ -657,11 -657,10 +658,11 @@@ void amdgpu_vm_move_to_lru_tail(struct 
>   		if (!bo->parent)
>   			continue;
>   
>  -		ttm_bo_move_to_lru_tail(&bo->tbo, &bo->tbo.mem,
>  +		ttm_bo_move_to_lru_tail(&bo->tbo, bo->tbo.resource,
>   					&vm->lru_bulk_move);
> - 		if (bo->shadow)
> - 			ttm_bo_move_to_lru_tail(&bo->shadow->tbo,
> + 		if (shadow)
>  -			ttm_bo_move_to_lru_tail(&shadow->tbo, &shadow->tbo.mem,
> ++			ttm_bo_move_to_lru_tail(&shadow->tbo,
>  +						shadow->tbo.resource,
>   						&vm->lru_bulk_move);
>   	}
>   	spin_unlock(&adev->mman.bdev.lru_lock);
> @@@ -1818,11 -1853,12 +1859,12 @@@ int amdgpu_vm_bo_update(struct amdgpu_d
>   			struct drm_gem_object *gobj = dma_buf->priv;
>   			struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj);
>   
>  -			if (abo->tbo.mem.mem_type == TTM_PL_VRAM)
>  +			if (abo->tbo.resource->mem_type == TTM_PL_VRAM)
>   				bo = gem_to_amdgpu_bo(gobj);
>   		}
>  -		mem = &bo->tbo.mem;
>  +		mem = bo->tbo.resource;
> - 		if (mem->mem_type == TTM_PL_TT)
> + 		if (mem->mem_type == TTM_PL_TT ||
> + 		    mem->mem_type == AMDGPU_PL_PREEMPT)
>   			pages_addr = bo->tbo.ttm->dma_address;
>   	}
>   

This is now a conflict between the drm-misc tree and the drm tree.

(I fixed up the resolution above)

-- 
Cheers,
Stephen Rothwell

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  parent reply	other threads:[~2021-06-04  2:33 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-03  2:48 linux-next: manual merge of the amdgpu tree with the drm-misc tree Stephen Rothwell
2021-06-03  2:48 ` Stephen Rothwell
2021-06-03  2:48 ` [Intel-gfx] " Stephen Rothwell
2021-06-03  2:55 ` Stephen Rothwell
2021-06-03  2:55   ` Stephen Rothwell
2021-06-03  2:55   ` Stephen Rothwell
2021-06-04  2:33 ` Stephen Rothwell [this message]
2021-06-04  2:33   ` Stephen Rothwell
2021-06-04  2:33   ` Stephen Rothwell
  -- strict thread matches above, loose matches on Subject: below --
2023-05-15  1:18 Stephen Rothwell
2023-05-15  1:18 ` Stephen Rothwell
2023-01-16  0:48 Stephen Rothwell
2023-01-16  0:48 ` Stephen Rothwell
2022-11-16  0:09 Stephen Rothwell
2022-11-16  0:09 ` Stephen Rothwell
2022-04-06  0:34 Stephen Rothwell
2022-04-06  0:34 ` Stephen Rothwell
2022-04-13  0:10 ` Stephen Rothwell
2022-04-13  0:10   ` Stephen Rothwell
2022-04-29  1:13   ` Stephen Rothwell
2022-04-29  1:13     ` Stephen Rothwell
2022-04-29 10:38     ` Christian König
2022-04-29 10:38       ` Christian König
2021-12-13 15:08 broonie
2021-05-21  1:42 Stephen Rothwell
2021-05-21  1:42 ` Stephen Rothwell
2021-05-21  1:38 Stephen Rothwell
2021-05-21  1:38 ` Stephen Rothwell
2021-05-21  1:20 Stephen Rothwell
2021-05-21  1:20 ` Stephen Rothwell
2021-05-21  1:16 Stephen Rothwell
2021-05-21  1:16 ` Stephen Rothwell
2021-05-12  0:20 Stephen Rothwell
2021-05-12  0:20 ` Stephen Rothwell

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