* [PATCH v2 0/4] soc: mediatek: MT8365 power support
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Markus Schneider-Pargmann
Hi,
this series contains patches related to the support of mt8365 power domains. I
took over the series from Fabien.
Best,
Markus
Changes in v2:
- Updated error handling path for scpsys_power_on()
- Minor updates described in each patch
Previous versions:
v1 - https://lore.kernel.org/linux-mediatek/20220530204214.913251-1-fparent@baylibre.com/
Alexandre Bailon (2):
soc: mediatek: Add support of WAY_EN operations
soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap
Fabien Parent (2):
dt-bindings: power: Add MT8365 power domains
soc: mediatek: pm-domains: Add support for MT8365
.../power/mediatek,power-controller.yaml | 2 +
drivers/soc/mediatek/mt8365-pm-domains.h | 147 ++++++++++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 98 +++++++++---
drivers/soc/mediatek/mtk-pm-domains.h | 29 ++--
include/dt-bindings/power/mt8365-power.h | 19 +++
5 files changed, 267 insertions(+), 28 deletions(-)
create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h
create mode 100644 include/dt-bindings/power/mt8365-power.h
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent, Markus Schneider-Pargmann
From: Fabien Parent <fparent@baylibre.com>
Add power domains dt-bindings for MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- Made include/dt-bindings/power/mt8365-power.h dual-license.
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 include/dt-bindings/power/mt8365-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 135c6f722091..2c6d3e4246b2 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -29,6 +29,7 @@ properties:
- mediatek,mt8186-power-controller
- mediatek,mt8192-power-controller
- mediatek,mt8195-power-controller
+ - mediatek,mt8365-power-controller
'#power-domain-cells':
const: 1
@@ -67,6 +68,7 @@ patternProperties:
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
"include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
"include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
+ "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
new file mode 100644
index 000000000000..e6cfd0ec7871
--- /dev/null
+++ b/include/dt-bindings/power/mt8365-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
+#define _DT_BINDINGS_POWER_MT8365_POWER_H
+
+#define MT8365_POWER_DOMAIN_MM 0
+#define MT8365_POWER_DOMAIN_CONN 1
+#define MT8365_POWER_DOMAIN_MFG 2
+#define MT8365_POWER_DOMAIN_AUDIO 3
+#define MT8365_POWER_DOMAIN_CAM 4
+#define MT8365_POWER_DOMAIN_DSP 5
+#define MT8365_POWER_DOMAIN_VDEC 6
+#define MT8365_POWER_DOMAIN_VENC 7
+#define MT8365_POWER_DOMAIN_APU 8
+
+#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent, Markus Schneider-Pargmann
From: Fabien Parent <fparent@baylibre.com>
Add power domains dt-bindings for MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- Made include/dt-bindings/power/mt8365-power.h dual-license.
.../power/mediatek,power-controller.yaml | 2 ++
include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 include/dt-bindings/power/mt8365-power.h
diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
index 135c6f722091..2c6d3e4246b2 100644
--- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
+++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
@@ -29,6 +29,7 @@ properties:
- mediatek,mt8186-power-controller
- mediatek,mt8192-power-controller
- mediatek,mt8195-power-controller
+ - mediatek,mt8365-power-controller
'#power-domain-cells':
const: 1
@@ -67,6 +68,7 @@ patternProperties:
"include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
"include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
"include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
+ "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
maxItems: 1
clocks:
diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
new file mode 100644
index 000000000000..e6cfd0ec7871
--- /dev/null
+++ b/include/dt-bindings/power/mt8365-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
+#define _DT_BINDINGS_POWER_MT8365_POWER_H
+
+#define MT8365_POWER_DOMAIN_MM 0
+#define MT8365_POWER_DOMAIN_CONN 1
+#define MT8365_POWER_DOMAIN_MFG 2
+#define MT8365_POWER_DOMAIN_AUDIO 3
+#define MT8365_POWER_DOMAIN_CAM 4
+#define MT8365_POWER_DOMAIN_DSP 5
+#define MT8365_POWER_DOMAIN_VDEC 6
+#define MT8365_POWER_DOMAIN_VENC 7
+#define MT8365_POWER_DOMAIN_APU 8
+
+#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 8:54 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 8:54 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Fabien Parent <fparent@baylibre.com>
>
> Add power domains dt-bindings for MT8365.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - Made include/dt-bindings/power/mt8365-power.h dual-license.
>
> .../power/mediatek,power-controller.yaml | 2 ++
> include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
> 2 files changed, 21 insertions(+)
> create mode 100644 include/dt-bindings/power/mt8365-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> index 135c6f722091..2c6d3e4246b2 100644
> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> @@ -29,6 +29,7 @@ properties:
> - mediatek,mt8186-power-controller
> - mediatek,mt8192-power-controller
> - mediatek,mt8195-power-controller
> + - mediatek,mt8365-power-controller
>
> '#power-domain-cells':
> const: 1
> @@ -67,6 +68,7 @@ patternProperties:
> "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
> "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
> "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
> + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
> maxItems: 1
>
> clocks:
> diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
> new file mode 100644
> index 000000000000..e6cfd0ec7871
> --- /dev/null
> +++ b/include/dt-bindings/power/mt8365-power.h
Please rename this file to add the vendor prefix.
mediatek,mt8365-power.h
Thanks,
Angelo
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
@ 2022-07-25 8:54 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 8:54 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Fabien Parent <fparent@baylibre.com>
>
> Add power domains dt-bindings for MT8365.
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - Made include/dt-bindings/power/mt8365-power.h dual-license.
>
> .../power/mediatek,power-controller.yaml | 2 ++
> include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
> 2 files changed, 21 insertions(+)
> create mode 100644 include/dt-bindings/power/mt8365-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> index 135c6f722091..2c6d3e4246b2 100644
> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> @@ -29,6 +29,7 @@ properties:
> - mediatek,mt8186-power-controller
> - mediatek,mt8192-power-controller
> - mediatek,mt8195-power-controller
> + - mediatek,mt8365-power-controller
>
> '#power-domain-cells':
> const: 1
> @@ -67,6 +68,7 @@ patternProperties:
> "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
> "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
> "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
> + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
> maxItems: 1
>
> clocks:
> diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
> new file mode 100644
> index 000000000000..e6cfd0ec7871
> --- /dev/null
> +++ b/include/dt-bindings/power/mt8365-power.h
Please rename this file to add the vendor prefix.
mediatek,mt8365-power.h
Thanks,
Angelo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
2022-07-25 8:54 ` AngeloGioacchino Del Regno
@ 2022-08-11 10:14 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-08-11 10:14 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
Hi Angelo,
On Mon, Jul 25, 2022 at 10:54:58AM +0200, AngeloGioacchino Del Regno wrote:
> Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> > From: Fabien Parent <fparent@baylibre.com>
> >
> > Add power domains dt-bindings for MT8365.
> >
> > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> > ---
> >
> > Notes:
> > Changes in v2:
> > - Made include/dt-bindings/power/mt8365-power.h dual-license.
> >
> > .../power/mediatek,power-controller.yaml | 2 ++
> > include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
> > 2 files changed, 21 insertions(+)
> > create mode 100644 include/dt-bindings/power/mt8365-power.h
> >
> > diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > index 135c6f722091..2c6d3e4246b2 100644
> > --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > @@ -29,6 +29,7 @@ properties:
> > - mediatek,mt8186-power-controller
> > - mediatek,mt8192-power-controller
> > - mediatek,mt8195-power-controller
> > + - mediatek,mt8365-power-controller
> > '#power-domain-cells':
> > const: 1
> > @@ -67,6 +68,7 @@ patternProperties:
> > "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
> > "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
> > "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
> > + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
> > maxItems: 1
> > clocks:
> > diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
> > new file mode 100644
> > index 000000000000..e6cfd0ec7871
> > --- /dev/null
> > +++ b/include/dt-bindings/power/mt8365-power.h
>
> Please rename this file to add the vendor prefix.
>
> mediatek,mt8365-power.h
Thank you for your feedback.
There are currently 12 'mt*-power.h' files without vendor prefix in that
directory. I can change it, but it seems very inconsistent.
Best,
Markus
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
@ 2022-08-11 10:14 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-08-11 10:14 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
Hi Angelo,
On Mon, Jul 25, 2022 at 10:54:58AM +0200, AngeloGioacchino Del Regno wrote:
> Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> > From: Fabien Parent <fparent@baylibre.com>
> >
> > Add power domains dt-bindings for MT8365.
> >
> > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> > ---
> >
> > Notes:
> > Changes in v2:
> > - Made include/dt-bindings/power/mt8365-power.h dual-license.
> >
> > .../power/mediatek,power-controller.yaml | 2 ++
> > include/dt-bindings/power/mt8365-power.h | 19 +++++++++++++++++++
> > 2 files changed, 21 insertions(+)
> > create mode 100644 include/dt-bindings/power/mt8365-power.h
> >
> > diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > index 135c6f722091..2c6d3e4246b2 100644
> > --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> > @@ -29,6 +29,7 @@ properties:
> > - mediatek,mt8186-power-controller
> > - mediatek,mt8192-power-controller
> > - mediatek,mt8195-power-controller
> > + - mediatek,mt8365-power-controller
> > '#power-domain-cells':
> > const: 1
> > @@ -67,6 +68,7 @@ patternProperties:
> > "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
> > "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
> > "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
> > + "include/dt-bindings/power/mt8365-power.h" - for MT8365 type power domain.
> > maxItems: 1
> > clocks:
> > diff --git a/include/dt-bindings/power/mt8365-power.h b/include/dt-bindings/power/mt8365-power.h
> > new file mode 100644
> > index 000000000000..e6cfd0ec7871
> > --- /dev/null
> > +++ b/include/dt-bindings/power/mt8365-power.h
>
> Please rename this file to add the vendor prefix.
>
> mediatek,mt8365-power.h
Thank you for your feedback.
There are currently 12 'mt*-power.h' files without vendor prefix in that
directory. I can change it, but it seems very inconsistent.
Best,
Markus
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
2022-08-11 10:14 ` Markus Schneider-Pargmann
@ 2022-08-11 10:45 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2022-08-11 10:45 UTC (permalink / raw)
To: Markus Schneider-Pargmann, AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
On 11/08/2022 13:14, Markus Schneider-Pargmann wrote:
>>> +++ b/include/dt-bindings/power/mt8365-power.h
>>
>> Please rename this file to add the vendor prefix.
>>
>> mediatek,mt8365-power.h
>
> Thank you for your feedback.
>
> There are currently 12 'mt*-power.h' files without vendor prefix in that
> directory. I can change it, but it seems very inconsistent.
Which is not really argument to keep old style instead of preferred
vendor,device.h.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: power: Add MT8365 power domains
@ 2022-08-11 10:45 ` Krzysztof Kozlowski
0 siblings, 0 replies; 22+ messages in thread
From: Krzysztof Kozlowski @ 2022-08-11 10:45 UTC (permalink / raw)
To: Markus Schneider-Pargmann, AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent
On 11/08/2022 13:14, Markus Schneider-Pargmann wrote:
>>> +++ b/include/dt-bindings/power/mt8365-power.h
>>
>> Please rename this file to add the vendor prefix.
>>
>> mediatek,mt8365-power.h
>
> Thank you for your feedback.
>
> There are currently 12 'mt*-power.h' files without vendor prefix in that
> directory. I can change it, but it seems very inconsistent.
Which is not really argument to keep old style instead of preferred
vendor,device.h.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent,
Markus Schneider-Pargmann
From: Alexandre Bailon <abailon@baylibre.com>
This updates the power domain to support WAY_EN operations. These
operations enable a path between different units of the chip and are
labeled as 'way_en' in the register descriptions.
This operation is required by the mt8365 for the MM power domain.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- some minor style fixes.
- Renamed 'wayen' to 'way_en' to clarify the meaning
- Updated commit message
drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
2 files changed, 68 insertions(+), 24 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 5ced254b082b..d0eae2227813 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -44,6 +44,7 @@ struct scpsys_domain {
struct clk_bulk_data *subsys_clks;
struct regmap *infracfg;
struct regmap *smi;
+ struct regmap *infracfg_nao;
struct regulator *supply;
};
@@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
MTK_POLL_TIMEOUT);
}
-static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
+static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
+ struct regmap *regmap, struct regmap *infracfg_nao)
{
int i, ret;
for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
- u32 val, mask = bpd[i].bus_prot_mask;
+ u32 mask = bpd[i].bus_prot_mask;
+ u32 val = mask, sta_mask = mask;
+ struct regmap *ack_regmap = regmap;
if (!mask)
break;
+ if (bpd[i].way_en) {
+ if (!infracfg_nao)
+ return -ENODEV;
+
+ val = 0;
+ sta_mask = bpd[i].bus_prot_sta_mask;
+ ack_regmap = infracfg_nao;
+ }
+
if (bpd[i].bus_prot_reg_update)
- regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
+ regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
else
regmap_write(regmap, bpd[i].bus_prot_set, mask);
- ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
- val, (val & mask) == mask,
+ if (bpd[i].ignore_clr_ack)
+ continue;
+
+ ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
+ val, (val & sta_mask) == sta_mask,
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
@@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
{
int ret;
- ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
+ ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
+ pd->infracfg, pd->infracfg_nao);
if (ret)
return ret;
- return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
+ return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
}
+#define mask_cond(way_en, val, mask) \
+ ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
+
static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
- struct regmap *regmap)
+ struct regmap *regmap, struct regmap *infracfg_nao)
{
int i, ret;
for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
- u32 val, mask = bpd[i].bus_prot_mask;
+ u32 val = 0, mask = bpd[i].bus_prot_mask;
+ u32 sta_mask = mask;
+ struct regmap *ack_regmap = regmap;
if (!mask)
continue;
+ if (bpd[i].way_en) {
+ if (!infracfg_nao)
+ return -ENODEV;
+
+ val = mask;
+ sta_mask = bpd[i].bus_prot_sta_mask;
+ ack_regmap = infracfg_nao;
+ }
+
if (bpd[i].bus_prot_reg_update)
- regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
+ regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
else
regmap_write(regmap, bpd[i].bus_prot_clr, mask);
if (bpd[i].ignore_clr_ack)
continue;
- ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
- val, !(val & mask),
+ ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
+ val, mask_cond(bpd[i].way_en, val, sta_mask),
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
@@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
{
int ret;
- ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
+ ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
if (ret)
return ret;
- return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
+ return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
+ pd->infracfg, pd->infracfg_nao);
}
static int scpsys_regulator_enable(struct regulator *supply)
@@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
return ERR_CAST(pd->smi);
}
+ pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
+ if (IS_ERR(pd->infracfg_nao))
+ return ERR_CAST(pd->infracfg_nao);
+
num_clks = of_clk_get_parent_count(node);
if (num_clks > 0) {
/* Calculate number of subsys_clks */
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index daa24e890dd4..e788d6bdde9d 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -39,23 +39,29 @@
#define SPM_MAX_BUS_PROT_DATA 6
-#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
- .bus_prot_mask = (_mask), \
- .bus_prot_set = _set, \
- .bus_prot_clr = _clr, \
- .bus_prot_sta = _sta, \
- .bus_prot_reg_update = _update, \
- .ignore_clr_ack = _ignore, \
+#define _BUS_PROT(_mask, _sta_mask, _set, _clr, _sta, _update, _ignore, _way_en) { \
+ .bus_prot_mask = (_mask), \
+ .bus_prot_set = _set, \
+ .bus_prot_clr = _clr, \
+ .bus_prot_sta = _sta, \
+ .bus_prot_sta_mask = _sta_mask, \
+ .bus_prot_reg_update = _update, \
+ .ignore_clr_ack = _ignore, \
+ .way_en = _way_en, \
}
#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, false, false)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, false, false)
#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, false, true)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, true, false)
#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, true, false)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, true, false, false)
+
+#define BUS_PROT_WAY_EN(_en_mask, _sta_mask, _set, _sta) \
+ _BUS_PROT(_en_mask, _sta_mask, _set, _set, _sta, true, false, \
+ true)
#define BUS_PROT_UPDATE_TOPAXI(_mask) \
BUS_PROT_UPDATE(_mask, \
@@ -68,8 +74,10 @@ struct scpsys_bus_prot_data {
u32 bus_prot_set;
u32 bus_prot_clr;
u32 bus_prot_sta;
+ u32 bus_prot_sta_mask;
bool bus_prot_reg_update;
bool ignore_clr_ack;
+ bool way_en;
};
/**
--
2.36.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent,
Markus Schneider-Pargmann
From: Alexandre Bailon <abailon@baylibre.com>
This updates the power domain to support WAY_EN operations. These
operations enable a path between different units of the chip and are
labeled as 'way_en' in the register descriptions.
This operation is required by the mt8365 for the MM power domain.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- some minor style fixes.
- Renamed 'wayen' to 'way_en' to clarify the meaning
- Updated commit message
drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
2 files changed, 68 insertions(+), 24 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 5ced254b082b..d0eae2227813 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -44,6 +44,7 @@ struct scpsys_domain {
struct clk_bulk_data *subsys_clks;
struct regmap *infracfg;
struct regmap *smi;
+ struct regmap *infracfg_nao;
struct regulator *supply;
};
@@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
MTK_POLL_TIMEOUT);
}
-static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
+static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
+ struct regmap *regmap, struct regmap *infracfg_nao)
{
int i, ret;
for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
- u32 val, mask = bpd[i].bus_prot_mask;
+ u32 mask = bpd[i].bus_prot_mask;
+ u32 val = mask, sta_mask = mask;
+ struct regmap *ack_regmap = regmap;
if (!mask)
break;
+ if (bpd[i].way_en) {
+ if (!infracfg_nao)
+ return -ENODEV;
+
+ val = 0;
+ sta_mask = bpd[i].bus_prot_sta_mask;
+ ack_regmap = infracfg_nao;
+ }
+
if (bpd[i].bus_prot_reg_update)
- regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
+ regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
else
regmap_write(regmap, bpd[i].bus_prot_set, mask);
- ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
- val, (val & mask) == mask,
+ if (bpd[i].ignore_clr_ack)
+ continue;
+
+ ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
+ val, (val & sta_mask) == sta_mask,
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
@@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
{
int ret;
- ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
+ ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
+ pd->infracfg, pd->infracfg_nao);
if (ret)
return ret;
- return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
+ return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
}
+#define mask_cond(way_en, val, mask) \
+ ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
+
static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
- struct regmap *regmap)
+ struct regmap *regmap, struct regmap *infracfg_nao)
{
int i, ret;
for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
- u32 val, mask = bpd[i].bus_prot_mask;
+ u32 val = 0, mask = bpd[i].bus_prot_mask;
+ u32 sta_mask = mask;
+ struct regmap *ack_regmap = regmap;
if (!mask)
continue;
+ if (bpd[i].way_en) {
+ if (!infracfg_nao)
+ return -ENODEV;
+
+ val = mask;
+ sta_mask = bpd[i].bus_prot_sta_mask;
+ ack_regmap = infracfg_nao;
+ }
+
if (bpd[i].bus_prot_reg_update)
- regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
+ regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
else
regmap_write(regmap, bpd[i].bus_prot_clr, mask);
if (bpd[i].ignore_clr_ack)
continue;
- ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
- val, !(val & mask),
+ ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
+ val, mask_cond(bpd[i].way_en, val, sta_mask),
MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
if (ret)
return ret;
@@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
{
int ret;
- ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
+ ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
if (ret)
return ret;
- return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
+ return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
+ pd->infracfg, pd->infracfg_nao);
}
static int scpsys_regulator_enable(struct regulator *supply)
@@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
return ERR_CAST(pd->smi);
}
+ pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
+ if (IS_ERR(pd->infracfg_nao))
+ return ERR_CAST(pd->infracfg_nao);
+
num_clks = of_clk_get_parent_count(node);
if (num_clks > 0) {
/* Calculate number of subsys_clks */
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index daa24e890dd4..e788d6bdde9d 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -39,23 +39,29 @@
#define SPM_MAX_BUS_PROT_DATA 6
-#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
- .bus_prot_mask = (_mask), \
- .bus_prot_set = _set, \
- .bus_prot_clr = _clr, \
- .bus_prot_sta = _sta, \
- .bus_prot_reg_update = _update, \
- .ignore_clr_ack = _ignore, \
+#define _BUS_PROT(_mask, _sta_mask, _set, _clr, _sta, _update, _ignore, _way_en) { \
+ .bus_prot_mask = (_mask), \
+ .bus_prot_set = _set, \
+ .bus_prot_clr = _clr, \
+ .bus_prot_sta = _sta, \
+ .bus_prot_sta_mask = _sta_mask, \
+ .bus_prot_reg_update = _update, \
+ .ignore_clr_ack = _ignore, \
+ .way_en = _way_en, \
}
#define BUS_PROT_WR(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, false, false)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, false, false)
#define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, false, true)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, true, false)
#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
- _BUS_PROT(_mask, _set, _clr, _sta, true, false)
+ _BUS_PROT(_mask, _mask, _set, _clr, _sta, true, false, false)
+
+#define BUS_PROT_WAY_EN(_en_mask, _sta_mask, _set, _sta) \
+ _BUS_PROT(_en_mask, _sta_mask, _set, _set, _sta, true, false, \
+ true)
#define BUS_PROT_UPDATE_TOPAXI(_mask) \
BUS_PROT_UPDATE(_mask, \
@@ -68,8 +74,10 @@ struct scpsys_bus_prot_data {
u32 bus_prot_set;
u32 bus_prot_clr;
u32 bus_prot_sta;
+ u32 bus_prot_sta_mask;
bool bus_prot_reg_update;
bool ignore_clr_ack;
+ bool way_en;
};
/**
--
2.36.1
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^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 9:55 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Alexandre Bailon <abailon@baylibre.com>
>
> This updates the power domain to support WAY_EN operations. These
> operations enable a path between different units of the chip and are
> labeled as 'way_en' in the register descriptions.
>
> This operation is required by the mt8365 for the MM power domain.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - some minor style fixes.
> - Renamed 'wayen' to 'way_en' to clarify the meaning
> - Updated commit message
>
> drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
> drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
> 2 files changed, 68 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 5ced254b082b..d0eae2227813 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -44,6 +44,7 @@ struct scpsys_domain {
> struct clk_bulk_data *subsys_clks;
> struct regmap *infracfg;
> struct regmap *smi;
> + struct regmap *infracfg_nao;
What does "nao" mean?
Besides, please move that before *infracfg to at least keep the same type members
alphabetically sorted..
> struct regulator *supply;
> };
>
> @@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
> MTK_POLL_TIMEOUT);
> }
>
> -static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
> +static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
> + struct regmap *regmap, struct regmap *infracfg_nao)
> {
> int i, ret;
>
> for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> - u32 val, mask = bpd[i].bus_prot_mask;
> + u32 mask = bpd[i].bus_prot_mask;
> + u32 val = mask, sta_mask = mask;
You have modified the macros to use sta_mask as mask, so, why are you doing
that distinction in here between the two? You can simply keep assigning
u32 mask = bpd[1].bus_prot_mask;
u32 sta_mask = bpd[1].bus_prot_sta_mask;
> + struct regmap *ack_regmap = regmap;
Double assignment. You're reassigning this if way_en == true.
>
> if (!mask)
> break;
>
> + if (bpd[i].way_en) {
> + if (!infracfg_nao)
> + return -ENODEV;
> +
> + val = 0;
> + sta_mask = bpd[i].bus_prot_sta_mask;
> + ack_regmap = infracfg_nao;
> + }
if (bpd[i].way_en) {
ack_regmap = regmap_nao;
val = 0;
} else {
ack_regmap = regmap;
val = mask;
}
> +
> if (bpd[i].bus_prot_reg_update)
> - regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
> + regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
> else
> regmap_write(regmap, bpd[i].bus_prot_set, mask);
>
> - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> - val, (val & mask) == mask,
> + if (bpd[i].ignore_clr_ack)
> + continue;
You're adding that ignore_clr_ack here in the bus prot enablement function
which wasn't here before... and I didn't check carefully, but I think that
this is wrong: as the name says, it's to "ignore CLEAR ack", we're not doing
any clearing here, we're not in bus_protect_disable.
If you're really sure that this is not a mistake, you should guard it for way_en.
> +
> + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> + val, (val & sta_mask) == sta_mask,
> MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> @@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> {
> int ret;
>
> - ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
> + ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
> + pd->infracfg, pd->infracfg_nao);
> if (ret)
> return ret;
>
> - return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
> + return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
> }
>
> +#define mask_cond(way_en, val, mask) \
> + ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
> +
> static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
> - struct regmap *regmap)
> + struct regmap *regmap, struct regmap *infracfg_nao)
> {
> int i, ret;
>
> for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
> - u32 val, mask = bpd[i].bus_prot_mask;
> + u32 val = 0, mask = bpd[i].bus_prot_mask;
> + u32 sta_mask = mask;
> + struct regmap *ack_regmap = regmap;
>
> if (!mask)
> continue;
>
> + if (bpd[i].way_en) {
> + if (!infracfg_nao)
> + return -ENODEV;
> +
> + val = mask;
> + sta_mask = bpd[i].bus_prot_sta_mask;
> + ack_regmap = infracfg_nao;
> + }
> +
> if (bpd[i].bus_prot_reg_update)
> - regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
> + regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
> else
> regmap_write(regmap, bpd[i].bus_prot_clr, mask);
>
> if (bpd[i].ignore_clr_ack)
> continue;
>
> - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> - val, !(val & mask),
> + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> + val, mask_cond(bpd[i].way_en, val, sta_mask),
"I don't know why", my brain still keeps telling me that using different functions
for the WAY_EN (en/dis) is just better.
This commit seems to be overcomplicating two "easy" en/dis functions.
> MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> @@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> {
> int ret;
>
> - ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
> + ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
> if (ret)
> return ret;
>
> - return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
> + return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
> + pd->infracfg, pd->infracfg_nao);
> }
>
> static int scpsys_regulator_enable(struct regulator *supply)
> @@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> return ERR_CAST(pd->smi);
> }
>
> + pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
> + if (IS_ERR(pd->infracfg_nao))
> + return ERR_CAST(pd->infracfg_nao);
> +
I think that we should enforce a check here:
pd->infracfg_nao = syscon_regmap_lookup_by_phandle(node, "mediatek,infracfg_nao");
if (IS_ERR(pd->infracfg_nao)) {
/* checking if infracfg_nao != NULL at every pwoeron/poweroff is largely
* suboptimal, as if it't present once, it's present always (!)
*/
if (we have WAY_EN)
return ERR_CAST ...
pd->infracfg_nao = NULL;
}
> num_clks = of_clk_get_parent_count(node);
> if (num_clks > 0) {
> /* Calculate number of subsys_clks */
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index daa24e890dd4..e788d6bdde9d 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -39,23 +39,29 @@
>
> #define SPM_MAX_BUS_PROT_DATA 6
>
> -#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
> - .bus_prot_mask = (_mask), \
> - .bus_prot_set = _set, \
> - .bus_prot_clr = _clr, \
> - .bus_prot_sta = _sta, \
> - .bus_prot_reg_update = _update, \
> - .ignore_clr_ack = _ignore, \
> +#define _BUS_PROT(_mask, _sta_mask, _set, _clr, _sta, _update, _ignore, _way_en) { \
> + .bus_prot_mask = (_mask), \
> + .bus_prot_set = _set, \
> + .bus_prot_clr = _clr, \
> + .bus_prot_sta = _sta, \
> + .bus_prot_sta_mask = _sta_mask, \
> + .bus_prot_reg_update = _update, \
> + .ignore_clr_ack = _ignore, \
> + .way_en = _way_en, \
> }
>
> #define BUS_PROT_WR(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, false, false)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, false, false)
>
> #define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, false, true)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, true, false)
>
> #define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, true, false)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, true, false, false)
> +
> +#define BUS_PROT_WAY_EN(_en_mask, _sta_mask, _set, _sta) \
> + _BUS_PROT(_en_mask, _sta_mask, _set, _set, _sta, true, false, \
> + true)
>
> #define BUS_PROT_UPDATE_TOPAXI(_mask) \
> BUS_PROT_UPDATE(_mask, \
> @@ -68,8 +74,10 @@ struct scpsys_bus_prot_data {
> u32 bus_prot_set;
> u32 bus_prot_clr;
> u32 bus_prot_sta;
> + u32 bus_prot_sta_mask;
> bool bus_prot_reg_update;
> bool ignore_clr_ack;
> + bool way_en;
> };
>
> /**
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
@ 2022-07-25 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 9:55 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Alexandre Bailon <abailon@baylibre.com>
>
> This updates the power domain to support WAY_EN operations. These
> operations enable a path between different units of the chip and are
> labeled as 'way_en' in the register descriptions.
>
> This operation is required by the mt8365 for the MM power domain.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - some minor style fixes.
> - Renamed 'wayen' to 'way_en' to clarify the meaning
> - Updated commit message
>
> drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
> drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
> 2 files changed, 68 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index 5ced254b082b..d0eae2227813 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -44,6 +44,7 @@ struct scpsys_domain {
> struct clk_bulk_data *subsys_clks;
> struct regmap *infracfg;
> struct regmap *smi;
> + struct regmap *infracfg_nao;
What does "nao" mean?
Besides, please move that before *infracfg to at least keep the same type members
alphabetically sorted..
> struct regulator *supply;
> };
>
> @@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
> MTK_POLL_TIMEOUT);
> }
>
> -static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
> +static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
> + struct regmap *regmap, struct regmap *infracfg_nao)
> {
> int i, ret;
>
> for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> - u32 val, mask = bpd[i].bus_prot_mask;
> + u32 mask = bpd[i].bus_prot_mask;
> + u32 val = mask, sta_mask = mask;
You have modified the macros to use sta_mask as mask, so, why are you doing
that distinction in here between the two? You can simply keep assigning
u32 mask = bpd[1].bus_prot_mask;
u32 sta_mask = bpd[1].bus_prot_sta_mask;
> + struct regmap *ack_regmap = regmap;
Double assignment. You're reassigning this if way_en == true.
>
> if (!mask)
> break;
>
> + if (bpd[i].way_en) {
> + if (!infracfg_nao)
> + return -ENODEV;
> +
> + val = 0;
> + sta_mask = bpd[i].bus_prot_sta_mask;
> + ack_regmap = infracfg_nao;
> + }
if (bpd[i].way_en) {
ack_regmap = regmap_nao;
val = 0;
} else {
ack_regmap = regmap;
val = mask;
}
> +
> if (bpd[i].bus_prot_reg_update)
> - regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
> + regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
> else
> regmap_write(regmap, bpd[i].bus_prot_set, mask);
>
> - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> - val, (val & mask) == mask,
> + if (bpd[i].ignore_clr_ack)
> + continue;
You're adding that ignore_clr_ack here in the bus prot enablement function
which wasn't here before... and I didn't check carefully, but I think that
this is wrong: as the name says, it's to "ignore CLEAR ack", we're not doing
any clearing here, we're not in bus_protect_disable.
If you're really sure that this is not a mistake, you should guard it for way_en.
> +
> + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> + val, (val & sta_mask) == sta_mask,
> MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> @@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> {
> int ret;
>
> - ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
> + ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
> + pd->infracfg, pd->infracfg_nao);
> if (ret)
> return ret;
>
> - return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
> + return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
> }
>
> +#define mask_cond(way_en, val, mask) \
> + ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
> +
> static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
> - struct regmap *regmap)
> + struct regmap *regmap, struct regmap *infracfg_nao)
> {
> int i, ret;
>
> for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
> - u32 val, mask = bpd[i].bus_prot_mask;
> + u32 val = 0, mask = bpd[i].bus_prot_mask;
> + u32 sta_mask = mask;
> + struct regmap *ack_regmap = regmap;
>
> if (!mask)
> continue;
>
> + if (bpd[i].way_en) {
> + if (!infracfg_nao)
> + return -ENODEV;
> +
> + val = mask;
> + sta_mask = bpd[i].bus_prot_sta_mask;
> + ack_regmap = infracfg_nao;
> + }
> +
> if (bpd[i].bus_prot_reg_update)
> - regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
> + regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
> else
> regmap_write(regmap, bpd[i].bus_prot_clr, mask);
>
> if (bpd[i].ignore_clr_ack)
> continue;
>
> - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> - val, !(val & mask),
> + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> + val, mask_cond(bpd[i].way_en, val, sta_mask),
"I don't know why", my brain still keeps telling me that using different functions
for the WAY_EN (en/dis) is just better.
This commit seems to be overcomplicating two "easy" en/dis functions.
> MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> if (ret)
> return ret;
> @@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> {
> int ret;
>
> - ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
> + ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
> if (ret)
> return ret;
>
> - return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
> + return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
> + pd->infracfg, pd->infracfg_nao);
> }
>
> static int scpsys_regulator_enable(struct regulator *supply)
> @@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> return ERR_CAST(pd->smi);
> }
>
> + pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
> + if (IS_ERR(pd->infracfg_nao))
> + return ERR_CAST(pd->infracfg_nao);
> +
I think that we should enforce a check here:
pd->infracfg_nao = syscon_regmap_lookup_by_phandle(node, "mediatek,infracfg_nao");
if (IS_ERR(pd->infracfg_nao)) {
/* checking if infracfg_nao != NULL at every pwoeron/poweroff is largely
* suboptimal, as if it't present once, it's present always (!)
*/
if (we have WAY_EN)
return ERR_CAST ...
pd->infracfg_nao = NULL;
}
> num_clks = of_clk_get_parent_count(node);
> if (num_clks > 0) {
> /* Calculate number of subsys_clks */
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index daa24e890dd4..e788d6bdde9d 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -39,23 +39,29 @@
>
> #define SPM_MAX_BUS_PROT_DATA 6
>
> -#define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \
> - .bus_prot_mask = (_mask), \
> - .bus_prot_set = _set, \
> - .bus_prot_clr = _clr, \
> - .bus_prot_sta = _sta, \
> - .bus_prot_reg_update = _update, \
> - .ignore_clr_ack = _ignore, \
> +#define _BUS_PROT(_mask, _sta_mask, _set, _clr, _sta, _update, _ignore, _way_en) { \
> + .bus_prot_mask = (_mask), \
> + .bus_prot_set = _set, \
> + .bus_prot_clr = _clr, \
> + .bus_prot_sta = _sta, \
> + .bus_prot_sta_mask = _sta_mask, \
> + .bus_prot_reg_update = _update, \
> + .ignore_clr_ack = _ignore, \
> + .way_en = _way_en, \
> }
>
> #define BUS_PROT_WR(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, false, false)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, false, false)
>
> #define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, false, true)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, false, true, false)
>
> #define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \
> - _BUS_PROT(_mask, _set, _clr, _sta, true, false)
> + _BUS_PROT(_mask, _mask, _set, _clr, _sta, true, false, false)
> +
> +#define BUS_PROT_WAY_EN(_en_mask, _sta_mask, _set, _sta) \
> + _BUS_PROT(_en_mask, _sta_mask, _set, _set, _sta, true, false, \
> + true)
>
> #define BUS_PROT_UPDATE_TOPAXI(_mask) \
> BUS_PROT_UPDATE(_mask, \
> @@ -68,8 +74,10 @@ struct scpsys_bus_prot_data {
> u32 bus_prot_set;
> u32 bus_prot_clr;
> u32 bus_prot_sta;
> + u32 bus_prot_sta_mask;
> bool bus_prot_reg_update;
> bool ignore_clr_ack;
> + bool way_en;
> };
>
> /**
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
2022-07-25 9:55 ` AngeloGioacchino Del Regno
@ 2022-08-19 12:42 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-08-19 12:42 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Hi Angelo,
Thanks for your review, I fixed most, comments inline.
On Mon, Jul 25, 2022 at 11:55:27AM +0200, AngeloGioacchino Del Regno wrote:
> Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> > From: Alexandre Bailon <abailon@baylibre.com>
> >
> > This updates the power domain to support WAY_EN operations. These
> > operations enable a path between different units of the chip and are
> > labeled as 'way_en' in the register descriptions.
> >
> > This operation is required by the mt8365 for the MM power domain.
> >
> > Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> > ---
> >
> > Notes:
> > Changes in v2:
> > - some minor style fixes.
> > - Renamed 'wayen' to 'way_en' to clarify the meaning
> > - Updated commit message
> >
> > drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
> > drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
> > 2 files changed, 68 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> > index 5ced254b082b..d0eae2227813 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.c
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> > @@ -44,6 +44,7 @@ struct scpsys_domain {
> > struct clk_bulk_data *subsys_clks;
> > struct regmap *infracfg;
> > struct regmap *smi;
> > + struct regmap *infracfg_nao;
>
> What does "nao" mean?
I couldn't find the meaning of nao right now. It is the name of the
infracfg node in the datasheet. The normal one is called 'infracfg_ao'
the other one 'infracfg_nao' as far as I can see.
>
> Besides, please move that before *infracfg to at least keep the same type members
> alphabetically sorted..
>
> > struct regulator *supply;
> > };
> > @@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
> > MTK_POLL_TIMEOUT);
> > }
> > -static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
> > +static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
> > + struct regmap *regmap, struct regmap *infracfg_nao)
> > {
> > int i, ret;
> > for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> > - u32 val, mask = bpd[i].bus_prot_mask;
> > + u32 mask = bpd[i].bus_prot_mask;
> > + u32 val = mask, sta_mask = mask;
>
> You have modified the macros to use sta_mask as mask, so, why are you doing
> that distinction in here between the two? You can simply keep assigning
>
> u32 mask = bpd[1].bus_prot_mask;
> u32 sta_mask = bpd[1].bus_prot_sta_mask;
>
> > + struct regmap *ack_regmap = regmap;
>
> Double assignment. You're reassigning this if way_en == true.
>
> > if (!mask)
> > break;
> > + if (bpd[i].way_en) {
> > + if (!infracfg_nao)
> > + return -ENODEV;
> > +
> > + val = 0;
> > + sta_mask = bpd[i].bus_prot_sta_mask;
> > + ack_regmap = infracfg_nao;
> > + }
>
> if (bpd[i].way_en) {
> ack_regmap = regmap_nao;
> val = 0;
> } else {
> ack_regmap = regmap;
> val = mask;
> }
>
> > +
> > if (bpd[i].bus_prot_reg_update)
> > - regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
> > + regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
> > else
> > regmap_write(regmap, bpd[i].bus_prot_set, mask);
> > - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> > - val, (val & mask) == mask,
> > + if (bpd[i].ignore_clr_ack)
> > + continue;
>
> You're adding that ignore_clr_ack here in the bus prot enablement function
> which wasn't here before... and I didn't check carefully, but I think that
> this is wrong: as the name says, it's to "ignore CLEAR ack", we're not doing
> any clearing here, we're not in bus_protect_disable.
>
> If you're really sure that this is not a mistake, you should guard it for way_en.
We are clearing bits here if way_en is true and bus_prot_reg_update is
true as well. Then val=0 and regmap_update_bits(..., mask, val) will
clear the bits given in mask. And yes either way_en or val==0 should
probably be checked here. Thanks.
>
> > +
> > + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> > + val, (val & sta_mask) == sta_mask,
> > MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> > if (ret)
> > return ret;
> > @@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> > {
> > int ret;
> > - ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
> > + ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
> > + pd->infracfg, pd->infracfg_nao);
> > if (ret)
> > return ret;
> > - return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
> > + return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
> > }
> > +#define mask_cond(way_en, val, mask) \
> > + ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
> > +
> > static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
> > - struct regmap *regmap)
> > + struct regmap *regmap, struct regmap *infracfg_nao)
> > {
> > int i, ret;
> > for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
> > - u32 val, mask = bpd[i].bus_prot_mask;
> > + u32 val = 0, mask = bpd[i].bus_prot_mask;
> > + u32 sta_mask = mask;
> > + struct regmap *ack_regmap = regmap;
> > if (!mask)
> > continue;
> > + if (bpd[i].way_en) {
> > + if (!infracfg_nao)
> > + return -ENODEV;
> > +
> > + val = mask;
> > + sta_mask = bpd[i].bus_prot_sta_mask;
> > + ack_regmap = infracfg_nao;
> > + }
> > +
> > if (bpd[i].bus_prot_reg_update)
> > - regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
> > + regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
> > else
> > regmap_write(regmap, bpd[i].bus_prot_clr, mask);
> > if (bpd[i].ignore_clr_ack)
> > continue;
> > - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> > - val, !(val & mask),
> > + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> > + val, mask_cond(bpd[i].way_en, val, sta_mask),
>
> "I don't know why", my brain still keeps telling me that using different functions
> for the WAY_EN (en/dis) is just better.
>
> This commit seems to be overcomplicating two "easy" en/dis functions.
Looking at the code again, I think you are right. I redesigned basically
this whole patch, and I think it is easier to understand now.
>
> > MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> > if (ret)
> > return ret;
> > @@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> > {
> > int ret;
> > - ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
> > + ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
> > if (ret)
> > return ret;
> > - return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
> > + return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
> > + pd->infracfg, pd->infracfg_nao);
> > }
> > static int scpsys_regulator_enable(struct regulator *supply)
> > @@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> > return ERR_CAST(pd->smi);
> > }
> > + pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
> > + if (IS_ERR(pd->infracfg_nao))
> > + return ERR_CAST(pd->infracfg_nao);
> > +
>
> I think that we should enforce a check here:
>
> pd->infracfg_nao = syscon_regmap_lookup_by_phandle(node, "mediatek,infracfg_nao");
> if (IS_ERR(pd->infracfg_nao)) {
> /* checking if infracfg_nao != NULL at every pwoeron/poweroff is largely
> * suboptimal, as if it't present once, it's present always (!)
> */
> if (we have WAY_EN)
> return ERR_CAST ...
> pd->infracfg_nao = NULL;
> }
Yes, I added another check that enforces .bp_smi not having any way_en
configuration.
Thanks,
Markus
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 2/4] soc: mediatek: Add support of WAY_EN operations
@ 2022-08-19 12:42 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-08-19 12:42 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu,
Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Hi Angelo,
Thanks for your review, I fixed most, comments inline.
On Mon, Jul 25, 2022 at 11:55:27AM +0200, AngeloGioacchino Del Regno wrote:
> Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> > From: Alexandre Bailon <abailon@baylibre.com>
> >
> > This updates the power domain to support WAY_EN operations. These
> > operations enable a path between different units of the chip and are
> > labeled as 'way_en' in the register descriptions.
> >
> > This operation is required by the mt8365 for the MM power domain.
> >
> > Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> > ---
> >
> > Notes:
> > Changes in v2:
> > - some minor style fixes.
> > - Renamed 'wayen' to 'way_en' to clarify the meaning
> > - Updated commit message
> >
> > drivers/soc/mediatek/mtk-pm-domains.c | 64 +++++++++++++++++++++------
> > drivers/soc/mediatek/mtk-pm-domains.h | 28 +++++++-----
> > 2 files changed, 68 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> > index 5ced254b082b..d0eae2227813 100644
> > --- a/drivers/soc/mediatek/mtk-pm-domains.c
> > +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> > @@ -44,6 +44,7 @@ struct scpsys_domain {
> > struct clk_bulk_data *subsys_clks;
> > struct regmap *infracfg;
> > struct regmap *smi;
> > + struct regmap *infracfg_nao;
>
> What does "nao" mean?
I couldn't find the meaning of nao right now. It is the name of the
infracfg node in the datasheet. The normal one is called 'infracfg_ao'
the other one 'infracfg_nao' as far as I can see.
>
> Besides, please move that before *infracfg to at least keep the same type members
> alphabetically sorted..
>
> > struct regulator *supply;
> > };
> > @@ -116,23 +117,38 @@ static int scpsys_sram_disable(struct scpsys_domain *pd)
> > MTK_POLL_TIMEOUT);
> > }
> > -static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, struct regmap *regmap)
> > +static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd,
> > + struct regmap *regmap, struct regmap *infracfg_nao)
> > {
> > int i, ret;
> > for (i = 0; i < SPM_MAX_BUS_PROT_DATA; i++) {
> > - u32 val, mask = bpd[i].bus_prot_mask;
> > + u32 mask = bpd[i].bus_prot_mask;
> > + u32 val = mask, sta_mask = mask;
>
> You have modified the macros to use sta_mask as mask, so, why are you doing
> that distinction in here between the two? You can simply keep assigning
>
> u32 mask = bpd[1].bus_prot_mask;
> u32 sta_mask = bpd[1].bus_prot_sta_mask;
>
> > + struct regmap *ack_regmap = regmap;
>
> Double assignment. You're reassigning this if way_en == true.
>
> > if (!mask)
> > break;
> > + if (bpd[i].way_en) {
> > + if (!infracfg_nao)
> > + return -ENODEV;
> > +
> > + val = 0;
> > + sta_mask = bpd[i].bus_prot_sta_mask;
> > + ack_regmap = infracfg_nao;
> > + }
>
> if (bpd[i].way_en) {
> ack_regmap = regmap_nao;
> val = 0;
> } else {
> ack_regmap = regmap;
> val = mask;
> }
>
> > +
> > if (bpd[i].bus_prot_reg_update)
> > - regmap_set_bits(regmap, bpd[i].bus_prot_set, mask);
> > + regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, val);
> > else
> > regmap_write(regmap, bpd[i].bus_prot_set, mask);
> > - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> > - val, (val & mask) == mask,
> > + if (bpd[i].ignore_clr_ack)
> > + continue;
>
> You're adding that ignore_clr_ack here in the bus prot enablement function
> which wasn't here before... and I didn't check carefully, but I think that
> this is wrong: as the name says, it's to "ignore CLEAR ack", we're not doing
> any clearing here, we're not in bus_protect_disable.
>
> If you're really sure that this is not a mistake, you should guard it for way_en.
We are clearing bits here if way_en is true and bus_prot_reg_update is
true as well. Then val=0 and regmap_update_bits(..., mask, val) will
clear the bits given in mask. And yes either way_en or val==0 should
probably be checked here. Thanks.
>
> > +
> > + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> > + val, (val & sta_mask) == sta_mask,
> > MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> > if (ret)
> > return ret;
> > @@ -145,34 +161,49 @@ static int scpsys_bus_protect_enable(struct scpsys_domain *pd)
> > {
> > int ret;
> > - ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg);
> > + ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg,
> > + pd->infracfg, pd->infracfg_nao);
> > if (ret)
> > return ret;
> > - return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi);
> > + return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi, NULL);
> > }
> > +#define mask_cond(way_en, val, mask) \
> > + ((way_en && ((val & mask) == mask)) || (!way_en && !(val & mask)))
> > +
> > static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd,
> > - struct regmap *regmap)
> > + struct regmap *regmap, struct regmap *infracfg_nao)
> > {
> > int i, ret;
> > for (i = SPM_MAX_BUS_PROT_DATA - 1; i >= 0; i--) {
> > - u32 val, mask = bpd[i].bus_prot_mask;
> > + u32 val = 0, mask = bpd[i].bus_prot_mask;
> > + u32 sta_mask = mask;
> > + struct regmap *ack_regmap = regmap;
> > if (!mask)
> > continue;
> > + if (bpd[i].way_en) {
> > + if (!infracfg_nao)
> > + return -ENODEV;
> > +
> > + val = mask;
> > + sta_mask = bpd[i].bus_prot_sta_mask;
> > + ack_regmap = infracfg_nao;
> > + }
> > +
> > if (bpd[i].bus_prot_reg_update)
> > - regmap_clear_bits(regmap, bpd[i].bus_prot_clr, mask);
> > + regmap_update_bits(regmap, bpd[i].bus_prot_clr, mask, val);
> > else
> > regmap_write(regmap, bpd[i].bus_prot_clr, mask);
> > if (bpd[i].ignore_clr_ack)
> > continue;
> > - ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta,
> > - val, !(val & mask),
> > + ret = regmap_read_poll_timeout(ack_regmap, bpd[i].bus_prot_sta,
> > + val, mask_cond(bpd[i].way_en, val, sta_mask),
>
> "I don't know why", my brain still keeps telling me that using different functions
> for the WAY_EN (en/dis) is just better.
>
> This commit seems to be overcomplicating two "easy" en/dis functions.
Looking at the code again, I think you are right. I redesigned basically
this whole patch, and I think it is easier to understand now.
>
> > MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT);
> > if (ret)
> > return ret;
> > @@ -185,11 +216,12 @@ static int scpsys_bus_protect_disable(struct scpsys_domain *pd)
> > {
> > int ret;
> > - ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi);
> > + ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi, NULL);
> > if (ret)
> > return ret;
> > - return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg);
> > + return _scpsys_bus_protect_disable(pd->data->bp_infracfg,
> > + pd->infracfg, pd->infracfg_nao);
> > }
> > static int scpsys_regulator_enable(struct regulator *supply)
> > @@ -363,6 +395,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> > return ERR_CAST(pd->smi);
> > }
> > + pd->infracfg_nao = syscon_regmap_lookup_by_phandle_optional(node, "mediatek,infracfg_nao");
> > + if (IS_ERR(pd->infracfg_nao))
> > + return ERR_CAST(pd->infracfg_nao);
> > +
>
> I think that we should enforce a check here:
>
> pd->infracfg_nao = syscon_regmap_lookup_by_phandle(node, "mediatek,infracfg_nao");
> if (IS_ERR(pd->infracfg_nao)) {
> /* checking if infracfg_nao != NULL at every pwoeron/poweroff is largely
> * suboptimal, as if it't present once, it's present always (!)
> */
> if (we have WAY_EN)
> return ERR_CAST ...
> pd->infracfg_nao = NULL;
> }
Yes, I added another check that enforces .bp_smi not having any way_en
configuration.
Thanks,
Markus
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 3/4] soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent,
Markus Schneider-Pargmann
From: Alexandre Bailon <abailon@baylibre.com>
This adds support for MTK_SCPD_STRICT_BUSP capability. It is a strict
bus protection policy that requires the bus protection to be disabled
before accessing the bus.
This is required by the mt8365, for the MM power domain.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- Fixup error handling path.
drivers/soc/mediatek/mtk-pm-domains.c | 29 +++++++++++++++++++++++----
drivers/soc/mediatek/mtk-pm-domains.h | 1 +
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index d0eae2227813..94ca8981f45e 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -240,6 +240,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
struct scpsys *scpsys = pd->scpsys;
bool tmp;
int ret;
+ bool strict_busprotect;
ret = scpsys_regulator_enable(pd->supply);
if (ret)
@@ -263,9 +264,18 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
- ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
- if (ret)
- goto err_pwr_ack;
+ /*
+ * In few Mediatek platforms(e.g. MT6779), the bus protect policy is
+ * stricter, which leads to bus protect release must be prior to bus
+ * access.
+ */
+ strict_busprotect = MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP);
+ if (!strict_busprotect) {
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
+ pd->subsys_clks);
+ if (ret)
+ goto err_pwr_ack;
+ }
ret = scpsys_sram_enable(pd);
if (ret < 0)
@@ -275,12 +285,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
if (ret < 0)
goto err_disable_sram;
+ if (strict_busprotect) {
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
+ pd->subsys_clks);
+ if (ret)
+ goto err_enable_bus_protect;
+ }
+
return 0;
+err_enable_bus_protect:
+ scpsys_bus_protect_enable(pd);
err_disable_sram:
scpsys_sram_disable(pd);
err_disable_subsys_clks:
- clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
+ if (!strict_busprotect)
+ clk_bulk_disable_unprepare(pd->num_subsys_clks,
+ pd->subsys_clks);
err_pwr_ack:
clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
err_reg:
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index e788d6bdde9d..a50cfb926d22 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -8,6 +8,7 @@
#define MTK_SCPD_SRAM_ISO BIT(2)
#define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
#define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
+#define MTK_SCPD_STRICT_BUSP BIT(5)
#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
#define SPM_VDE_PWR_CON 0x0210
--
2.36.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 3/4] soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent,
Markus Schneider-Pargmann
From: Alexandre Bailon <abailon@baylibre.com>
This adds support for MTK_SCPD_STRICT_BUSP capability. It is a strict
bus protection policy that requires the bus protection to be disabled
before accessing the bus.
This is required by the mt8365, for the MM power domain.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
Notes:
Changes in v2:
- Fixup error handling path.
drivers/soc/mediatek/mtk-pm-domains.c | 29 +++++++++++++++++++++++----
drivers/soc/mediatek/mtk-pm-domains.h | 1 +
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index d0eae2227813..94ca8981f45e 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -240,6 +240,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
struct scpsys *scpsys = pd->scpsys;
bool tmp;
int ret;
+ bool strict_busprotect;
ret = scpsys_regulator_enable(pd->supply);
if (ret)
@@ -263,9 +264,18 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
- ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
- if (ret)
- goto err_pwr_ack;
+ /*
+ * In few Mediatek platforms(e.g. MT6779), the bus protect policy is
+ * stricter, which leads to bus protect release must be prior to bus
+ * access.
+ */
+ strict_busprotect = MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP);
+ if (!strict_busprotect) {
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
+ pd->subsys_clks);
+ if (ret)
+ goto err_pwr_ack;
+ }
ret = scpsys_sram_enable(pd);
if (ret < 0)
@@ -275,12 +285,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
if (ret < 0)
goto err_disable_sram;
+ if (strict_busprotect) {
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
+ pd->subsys_clks);
+ if (ret)
+ goto err_enable_bus_protect;
+ }
+
return 0;
+err_enable_bus_protect:
+ scpsys_bus_protect_enable(pd);
err_disable_sram:
scpsys_sram_disable(pd);
err_disable_subsys_clks:
- clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
+ if (!strict_busprotect)
+ clk_bulk_disable_unprepare(pd->num_subsys_clks,
+ pd->subsys_clks);
err_pwr_ack:
clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
err_reg:
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index e788d6bdde9d..a50cfb926d22 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -8,6 +8,7 @@
#define MTK_SCPD_SRAM_ISO BIT(2)
#define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
#define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
+#define MTK_SCPD_STRICT_BUSP BIT(5)
#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
#define SPM_VDE_PWR_CON 0x0210
--
2.36.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 9:07 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 9:07 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Alexandre Bailon <abailon@baylibre.com>
>
> This adds support for MTK_SCPD_STRICT_BUSP capability. It is a strict
> bus protection policy that requires the bus protection to be disabled
> before accessing the bus.
> This is required by the mt8365, for the MM power domain.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - Fixup error handling path.
>
> drivers/soc/mediatek/mtk-pm-domains.c | 29 +++++++++++++++++++++++----
> drivers/soc/mediatek/mtk-pm-domains.h | 1 +
> 2 files changed, 26 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index d0eae2227813..94ca8981f45e 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -240,6 +240,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> struct scpsys *scpsys = pd->scpsys;
> bool tmp;
> int ret;
> + bool strict_busprotect;
>
> ret = scpsys_regulator_enable(pd->supply);
> if (ret)
> @@ -263,9 +264,18 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
> regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>
> - ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
> - if (ret)
> - goto err_pwr_ack;
> + /*
> + * In few Mediatek platforms(e.g. MT6779), the bus protect policy is
> + * stricter, which leads to bus protect release must be prior to bus
> + * access.
> + */
> + strict_busprotect = MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP);
> + if (!strict_busprotect) {
Please directly check for MTK_SCPD_CAPS, you don't really need that bool variable,
not even for performance... and it fits just fine in one line, even.
if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
> + ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
> + pd->subsys_clks);
> + if (ret)
> + goto err_pwr_ack;
> + }
>
> ret = scpsys_sram_enable(pd);
> if (ret < 0)
> @@ -275,12 +285,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> if (ret < 0)
> goto err_disable_sram;
>
> + if (strict_busprotect) {
if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
> + ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
> + pd->subsys_clks);
> + if (ret)
> + goto err_enable_bus_protect;
> + }
> +
> return 0;
>
> +err_enable_bus_protect:
For human readability purposes (and paranoidly preventing future mistakes), I'd
add a check for the strict bus protection cap here too.
> + scpsys_bus_protect_enable(pd);
> err_disable_sram:
> scpsys_sram_disable(pd);
> err_disable_subsys_clks:
> - clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
> + if (!strict_busprotect)
> + clk_bulk_disable_unprepare(pd->num_subsys_clks,
> + pd->subsys_clks);
> err_pwr_ack:
> clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
> err_reg:
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index e788d6bdde9d..a50cfb926d22 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -8,6 +8,7 @@
> #define MTK_SCPD_SRAM_ISO BIT(2)
> #define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
> #define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
> +#define MTK_SCPD_STRICT_BUSP BIT(5)
MTK_SCPD_STRICT_BUS_PROTECTION is a bit more human readable.
> #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
>
> #define SPM_VDE_PWR_CON 0x0210
Regards,
Angelo
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 3/4] soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap
@ 2022-07-25 9:07 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 22+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-25 9:07 UTC (permalink / raw)
To: Markus Schneider-Pargmann, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Alexandre Bailon, Fabien Parent
Il 25/07/22 10:18, Markus Schneider-Pargmann ha scritto:
> From: Alexandre Bailon <abailon@baylibre.com>
>
> This adds support for MTK_SCPD_STRICT_BUSP capability. It is a strict
> bus protection policy that requires the bus protection to be disabled
> before accessing the bus.
> This is required by the mt8365, for the MM power domain.
>
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
>
> Notes:
> Changes in v2:
> - Fixup error handling path.
>
> drivers/soc/mediatek/mtk-pm-domains.c | 29 +++++++++++++++++++++++----
> drivers/soc/mediatek/mtk-pm-domains.h | 1 +
> 2 files changed, 26 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index d0eae2227813..94ca8981f45e 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -240,6 +240,7 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> struct scpsys *scpsys = pd->scpsys;
> bool tmp;
> int ret;
> + bool strict_busprotect;
>
> ret = scpsys_regulator_enable(pd->supply);
> if (ret)
> @@ -263,9 +264,18 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
> regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
>
> - ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
> - if (ret)
> - goto err_pwr_ack;
> + /*
> + * In few Mediatek platforms(e.g. MT6779), the bus protect policy is
> + * stricter, which leads to bus protect release must be prior to bus
> + * access.
> + */
> + strict_busprotect = MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP);
> + if (!strict_busprotect) {
Please directly check for MTK_SCPD_CAPS, you don't really need that bool variable,
not even for performance... and it fits just fine in one line, even.
if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
> + ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
> + pd->subsys_clks);
> + if (ret)
> + goto err_pwr_ack;
> + }
>
> ret = scpsys_sram_enable(pd);
> if (ret < 0)
> @@ -275,12 +285,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> if (ret < 0)
> goto err_disable_sram;
>
> + if (strict_busprotect) {
if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {
> + ret = clk_bulk_prepare_enable(pd->num_subsys_clks,
> + pd->subsys_clks);
> + if (ret)
> + goto err_enable_bus_protect;
> + }
> +
> return 0;
>
> +err_enable_bus_protect:
For human readability purposes (and paranoidly preventing future mistakes), I'd
add a check for the strict bus protection cap here too.
> + scpsys_bus_protect_enable(pd);
> err_disable_sram:
> scpsys_sram_disable(pd);
> err_disable_subsys_clks:
> - clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);
> + if (!strict_busprotect)
> + clk_bulk_disable_unprepare(pd->num_subsys_clks,
> + pd->subsys_clks);
> err_pwr_ack:
> clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
> err_reg:
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index e788d6bdde9d..a50cfb926d22 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -8,6 +8,7 @@
> #define MTK_SCPD_SRAM_ISO BIT(2)
> #define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
> #define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
> +#define MTK_SCPD_STRICT_BUSP BIT(5)
MTK_SCPD_STRICT_BUS_PROTECTION is a bit more human readable.
> #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
>
> #define SPM_VDE_PWR_CON 0x0210
Regards,
Angelo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 4/4] soc: mediatek: pm-domains: Add support for MT8365
2022-07-25 8:18 ` Markus Schneider-Pargmann
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
-1 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent, Markus Schneider-Pargmann
From: Fabien Parent <fparent@baylibre.com>
Add the needed board data to support MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
drivers/soc/mediatek/mt8365-pm-domains.h | 147 +++++++++++++++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 5 +
2 files changed, 152 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h
diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h
new file mode 100644
index 000000000000..011049d64bb2
--- /dev/null
+++ b/drivers/soc/mediatek/mt8365-pm-domains.h
@@ -0,0 +1,147 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H
+#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H
+
+#include "mtk-pm-domains.h"
+#include <dt-bindings/power/mt8365-power.h>
+
+/*
+ * MT8365 power domain support
+ */
+
+static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = {
+ [MT8365_POWER_DOMAIN_MM] = {
+ .name = "mm",
+ .sta_mask = PWR_STATUS_DISP,
+ .ctl_offs = 0x30c,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .caps = MTK_SCPD_STRICT_BUSP,
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258),
+ BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WAY_EN(BIT(6), BIT(24), 0x200, 0x0),
+ BUS_PROT_WAY_EN(BIT(5), BIT(14), 0x234, 0x28),
+ BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228),
+ },
+ },
+ [MT8365_POWER_DOMAIN_VENC] = {
+ .name = "venc",
+ .sta_mask = PWR_STATUS_VENC,
+ .ctl_offs = 0x0304,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .bp_smi = {
+ BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
+ .sta_mask = PWR_STATUS_AUDIO,
+ .ctl_offs = 0x0314,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(12, 8),
+ .sram_pdn_ack_bits = GENMASK(17, 13),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+ [MT8365_POWER_DOMAIN_CONN] = {
+ .name = "conn",
+ .sta_mask = PWR_STATUS_CONN,
+ .ctl_offs = 0x032c,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = 0,
+ .sram_pdn_ack_bits = 0,
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258),
+ BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF,
+ },
+ [MT8365_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
+ .sta_mask = PWR_STATUS_MFG,
+ .ctl_offs = 0x0338,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(9, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228),
+ },
+ },
+ [MT8365_POWER_DOMAIN_CAM] = {
+ .name = "cam",
+ .sta_mask = BIT(25),
+ .ctl_offs = 0x0344,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(9, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258),
+ },
+ .bp_smi = {
+ BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
+ .sta_mask = BIT(31),
+ .ctl_offs = 0x0370,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .bp_smi = {
+ BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_APU] = {
+ .name = "apu",
+ .sta_mask = BIT(16),
+ .ctl_offs = 0x0378,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(14, 8),
+ .sram_pdn_ack_bits = GENMASK(21, 15),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258),
+ },
+ .bp_smi = {
+ BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_DSP] = {
+ .name = "dsp",
+ .sta_mask = BIT(17),
+ .ctl_offs = 0x037C,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+};
+
+static const struct scpsys_soc_data mt8365_scpsys_data = {
+ .domains_data = scpsys_domain_data_mt8365,
+ .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365),
+};
+
+#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 94ca8981f45e..7bfadc8dee7e 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -22,6 +22,7 @@
#include "mt8186-pm-domains.h"
#include "mt8192-pm-domains.h"
#include "mt8195-pm-domains.h"
+#include "mt8365-pm-domains.h"
#define MTK_POLL_DELAY_US 10
#define MTK_POLL_TIMEOUT USEC_PER_SEC
@@ -636,6 +637,10 @@ static const struct of_device_id scpsys_of_match[] = {
.compatible = "mediatek,mt8195-power-controller",
.data = &mt8195_scpsys_data,
},
+ {
+ .compatible = "mediatek,mt8365-power-controller",
+ .data = &mt8365_scpsys_data,
+ },
{ }
};
--
2.36.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v2 4/4] soc: mediatek: pm-domains: Add support for MT8365
@ 2022-07-25 8:18 ` Markus Schneider-Pargmann
0 siblings, 0 replies; 22+ messages in thread
From: Markus Schneider-Pargmann @ 2022-07-25 8:18 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger, Weiyi Lu
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek, Fabien Parent, Markus Schneider-Pargmann
From: Fabien Parent <fparent@baylibre.com>
Add the needed board data to support MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
---
drivers/soc/mediatek/mt8365-pm-domains.h | 147 +++++++++++++++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 5 +
2 files changed, 152 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h
diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h
new file mode 100644
index 000000000000..011049d64bb2
--- /dev/null
+++ b/drivers/soc/mediatek/mt8365-pm-domains.h
@@ -0,0 +1,147 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H
+#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H
+
+#include "mtk-pm-domains.h"
+#include <dt-bindings/power/mt8365-power.h>
+
+/*
+ * MT8365 power domain support
+ */
+
+static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = {
+ [MT8365_POWER_DOMAIN_MM] = {
+ .name = "mm",
+ .sta_mask = PWR_STATUS_DISP,
+ .ctl_offs = 0x30c,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .caps = MTK_SCPD_STRICT_BUSP,
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258),
+ BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WAY_EN(BIT(6), BIT(24), 0x200, 0x0),
+ BUS_PROT_WAY_EN(BIT(5), BIT(14), 0x234, 0x28),
+ BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228),
+ },
+ },
+ [MT8365_POWER_DOMAIN_VENC] = {
+ .name = "venc",
+ .sta_mask = PWR_STATUS_VENC,
+ .ctl_offs = 0x0304,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .bp_smi = {
+ BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
+ .sta_mask = PWR_STATUS_AUDIO,
+ .ctl_offs = 0x0314,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(12, 8),
+ .sram_pdn_ack_bits = GENMASK(17, 13),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+ [MT8365_POWER_DOMAIN_CONN] = {
+ .name = "conn",
+ .sta_mask = PWR_STATUS_CONN,
+ .ctl_offs = 0x032c,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = 0,
+ .sram_pdn_ack_bits = 0,
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258),
+ BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF,
+ },
+ [MT8365_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
+ .sta_mask = PWR_STATUS_MFG,
+ .ctl_offs = 0x0338,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(9, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228),
+ BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228),
+ },
+ },
+ [MT8365_POWER_DOMAIN_CAM] = {
+ .name = "cam",
+ .sta_mask = BIT(25),
+ .ctl_offs = 0x0344,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(9, 8),
+ .sram_pdn_ack_bits = GENMASK(13, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258),
+ },
+ .bp_smi = {
+ BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
+ .sta_mask = BIT(31),
+ .ctl_offs = 0x0370,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(8, 8),
+ .sram_pdn_ack_bits = GENMASK(12, 12),
+ .bp_smi = {
+ BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_APU] = {
+ .name = "apu",
+ .sta_mask = BIT(16),
+ .ctl_offs = 0x0378,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(14, 8),
+ .sram_pdn_ack_bits = GENMASK(21, 15),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258),
+ },
+ .bp_smi = {
+ BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0),
+ },
+ },
+ [MT8365_POWER_DOMAIN_DSP] = {
+ .name = "dsp",
+ .sta_mask = BIT(17),
+ .ctl_offs = 0x037C,
+ .pwr_sta_offs = 0x0180,
+ .pwr_sta2nd_offs = 0x0184,
+ .sram_pdn_bits = GENMASK(11, 8),
+ .sram_pdn_ack_bits = GENMASK(15, 12),
+ .bp_infracfg = {
+ BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258),
+ },
+ .caps = MTK_SCPD_ACTIVE_WAKEUP,
+ },
+};
+
+static const struct scpsys_soc_data mt8365_scpsys_data = {
+ .domains_data = scpsys_domain_data_mt8365,
+ .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365),
+};
+
+#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 94ca8981f45e..7bfadc8dee7e 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -22,6 +22,7 @@
#include "mt8186-pm-domains.h"
#include "mt8192-pm-domains.h"
#include "mt8195-pm-domains.h"
+#include "mt8365-pm-domains.h"
#define MTK_POLL_DELAY_US 10
#define MTK_POLL_TIMEOUT USEC_PER_SEC
@@ -636,6 +637,10 @@ static const struct of_device_id scpsys_of_match[] = {
.compatible = "mediatek,mt8195-power-controller",
.data = &mt8195_scpsys_data,
},
+ {
+ .compatible = "mediatek,mt8365-power-controller",
+ .data = &mt8365_scpsys_data,
+ },
{ }
};
--
2.36.1
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