From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: kan.liang@linux.intel.com, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: [PATCH 06/12] iommu/vt-d: Support size of the register set in DRHD
Date: Tue, 31 Jan 2023 15:37:34 +0800 [thread overview]
Message-ID: <20230131073740.378984-7-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20230131073740.378984-1-baolu.lu@linux.intel.com>
From: Kan Liang <kan.liang@linux.intel.com>
A new field, which indicates the size of the remapping hardware register
set for this remapping unit, is introduced in the DMA-remapping hardware
unit definition (DRHD) structure with the VT-d Spec 4.0. With this
information, SW doesn't need to 'guess' the size of the register set
anymore.
Update the struct acpi_dmar_hardware_unit to reflect the field. Store the
size of the register set in struct dmar_drhd_unit for each dmar device.
The 'size' information is ResvZ for the old BIOS and platforms. Fall back
to the old guessing method. There is nothing changed.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Link: https://lore.kernel.org/r/20230128200428.1459118-2-kan.liang@linux.intel.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
include/linux/dmar.h | 1 +
include/acpi/actbl1.h | 2 +-
drivers/iommu/intel/dmar.c | 11 +++++++----
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index d81a51978d01..725d5e6acec0 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -39,6 +39,7 @@ struct dmar_drhd_unit {
struct list_head list; /* list of drhd units */
struct acpi_dmar_header *hdr; /* ACPI header */
u64 reg_base_addr; /* register base address*/
+ unsigned long reg_size; /* size of register set */
struct dmar_dev_scope *devices;/* target device array */
int devices_cnt; /* target device count */
u16 segment; /* PCI domain */
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 4175dce3967c..bdded0ac46eb 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -802,7 +802,7 @@ struct acpi_dmar_pci_path {
struct acpi_dmar_hardware_unit {
struct acpi_dmar_header header;
u8 flags;
- u8 reserved;
+ u8 size; /* Size of the register set */
u16 segment;
u64 address; /* Register Base Address */
};
diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
index b00a0ceb2d13..3a40fef1ec1b 100644
--- a/drivers/iommu/intel/dmar.c
+++ b/drivers/iommu/intel/dmar.c
@@ -427,6 +427,8 @@ static int dmar_parse_one_drhd(struct acpi_dmar_header *header, void *arg)
memcpy(dmaru->hdr, header, header->length);
dmaru->reg_base_addr = drhd->address;
dmaru->segment = drhd->segment;
+ /* The size of the register set is 2 ^ N 4 KB pages. */
+ dmaru->reg_size = 1UL << (drhd->size + 12);
dmaru->include_all = drhd->flags & 0x1; /* BIT0: INCLUDE_ALL */
dmaru->devices = dmar_alloc_dev_scope((void *)(drhd + 1),
((void *)drhd) + drhd->header.length,
@@ -956,17 +958,18 @@ static void unmap_iommu(struct intel_iommu *iommu)
/**
* map_iommu: map the iommu's registers
* @iommu: the iommu to map
- * @phys_addr: the physical address of the base resgister
+ * @drhd: DMA remapping hardware definition structure
*
* Memory map the iommu's registers. Start w/ a single page, and
* possibly expand if that turns out to be insufficent.
*/
-static int map_iommu(struct intel_iommu *iommu, u64 phys_addr)
+static int map_iommu(struct intel_iommu *iommu, struct dmar_drhd_unit *drhd)
{
+ u64 phys_addr = drhd->reg_base_addr;
int map_size, err=0;
iommu->reg_phys = phys_addr;
- iommu->reg_size = VTD_PAGE_SIZE;
+ iommu->reg_size = drhd->reg_size;
if (!request_mem_region(iommu->reg_phys, iommu->reg_size, iommu->name)) {
pr_err("Can't reserve memory\n");
@@ -1050,7 +1053,7 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
}
sprintf(iommu->name, "dmar%d", iommu->seq_id);
- err = map_iommu(iommu, drhd->reg_base_addr);
+ err = map_iommu(iommu, drhd);
if (err) {
pr_err("Failed to map %s\n", iommu->name);
goto error_free_seq_id;
--
2.34.1
next prev parent reply other threads:[~2023-01-31 7:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-31 7:37 [PATCH 00/12] [PULL REQUEST] Intel IOMMU updates for Linux v6.3 Lu Baolu
2023-01-31 7:37 ` [PATCH 01/12] iommu/vt-d: Remove include/linux/intel-svm.h Lu Baolu
2023-01-31 7:37 ` [PATCH 02/12] iommu/vt-d: Remove unused fields in svm structures Lu Baolu
2023-01-31 7:37 ` [PATCH 03/12] iommu/vt-d: Remove users from intel_svm_dev Lu Baolu
2023-01-31 7:37 ` [PATCH 04/12] iommu/vt-d: Remove sva " Lu Baolu
2023-01-31 7:37 ` [PATCH 05/12] iommu/vt-d: Set No Execute Enable bit in PASID table entry Lu Baolu
2023-01-31 7:37 ` Lu Baolu [this message]
2023-01-31 7:37 ` [PATCH 07/12] iommu/vt-d: Retrieve IOMMU perfmon capability information Lu Baolu
2023-01-31 7:37 ` [PATCH 08/12] iommu/vt-d: Support Enhanced Command Interface Lu Baolu
2023-01-31 7:37 ` [PATCH 09/12] iommu/vt-d: Add IOMMU perfmon support Lu Baolu
2023-01-31 7:37 ` [PATCH 10/12] iommu/vt-d: Support cpumask for IOMMU perfmon Lu Baolu
2023-01-31 7:37 ` [PATCH 11/12] iommu/vt-d: Add IOMMU perfmon overflow handler support Lu Baolu
2023-01-31 7:37 ` [PATCH 12/12] iommu/vt-d: Enable IOMMU perfmon support Lu Baolu
2023-02-03 10:09 ` [PATCH 00/12] [PULL REQUEST] Intel IOMMU updates for Linux v6.3 Joerg Roedel
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