* [PATCH v3 0/2] efi/cxl-cper: Report CXL CPER events through tracing
@ 2024-04-26 20:02 Ira Weiny
2024-04-26 20:02 ` [PATCH v3 1/2] acpi/ghes: Process CXL Component Events Ira Weiny
2024-04-26 20:03 ` [PATCH v3 2/2] cxl/pci: Process CPER events Ira Weiny
0 siblings, 2 replies; 6+ messages in thread
From: Ira Weiny @ 2024-04-26 20:02 UTC (permalink / raw)
To: Dave Jiang, Dan Williams, Jonathan Cameron, Smita Koralahalli,
Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny, Rafael J. Wysocki, Tony Luck, Borislav Petkov
If a device is configured for firmware first CXL event records are not
sent directly to the host, rather they are reported through the EFI
Common Platform Error Records (CPER). EFI 2.10 Section N.2.14 defines
the CXL CPER to wrap a mostly CXL event payload.
The CXL sub-system uniquely has DPA to HPA translation information.[0]
It also already has event decoding/tracing. Such translations are very
useful for users to determine which system issues may correspond to
specific hardware events.
The restructuring of the event data structures in 6.8 made sharing the
data between CPER/event logs more efficient. Now re-wire the sending of
CPER records to the CXL sub-system.
Series status/background
========================
Smita and Jonathan have been a great help with this series. Once again
thank you.
Unfortunately, with all the churn surrounding the bug which Dan
Carpenter found the maintainers were force to revert this work.
Testing
=======
Continue to use my quick hack in debugfs to facilitate easier testing.[1]
[0]
Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
[1]
Link: https://github.com/weiny2/linux-kernel/commit/9b1f33314e8488506dbad63dc1c896386d4803d6
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes in v3:
- djbw: drop patch which traces errors if CXL is not loaded
- djbw: Let CXL layer declare work struct. Leave kfifo management in
GHES layer
- Link to v2: https://lore.kernel.org/r/20240422-cxl-cper3-v2-0-5cdd378fcd0b@intel.com
---
Ira Weiny (2):
acpi/ghes: Process CXL Component Events
cxl/pci: Process CPER events
drivers/acpi/apei/ghes.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++
drivers/cxl/pci.c | 71 +++++++++++++++++++++++++++++-
include/linux/cxl-event.h | 27 ++++++++++++
3 files changed, 207 insertions(+), 1 deletion(-)
---
base-commit: e33c4963bf536900f917fb65a687724d5539bc21
change-id: 20240220-cxl-cper3-30e55279f936
Best regards,
--
Ira Weiny <ira.weiny@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3 1/2] acpi/ghes: Process CXL Component Events
2024-04-26 20:02 [PATCH v3 0/2] efi/cxl-cper: Report CXL CPER events through tracing Ira Weiny
@ 2024-04-26 20:02 ` Ira Weiny
2024-04-26 23:50 ` Dan Williams
2024-04-26 20:03 ` [PATCH v3 2/2] cxl/pci: Process CPER events Ira Weiny
1 sibling, 1 reply; 6+ messages in thread
From: Ira Weiny @ 2024-04-26 20:02 UTC (permalink / raw)
To: Dave Jiang, Dan Williams, Jonathan Cameron, Smita Koralahalli,
Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny, Rafael J. Wysocki, Tony Luck, Borislav Petkov
BIOS can configure memory devices as firmware first. This will send CXL
events to the firmware instead of the OS. The firmware can then inform
the OS of these events via UEFI.
UEFI v2.10 section N.2.14 defines a Common Platform Error Record (CPER)
format for CXL Component Events. The format is mostly the same as the
CXL Common Event Record Format. The difference lies in the use of a
GUID as the CPER Section Type which matches the UUID defined in CXL 3.1
Table 8-43.
Currently a configuration such as this will trace a non standard event
in the log omitting useful details of the event. In addition the CXL
sub-system contains additional region and HPA information useful to the
user.[0]
The CXL code is required to be called from process context as it needs
to take a device lock. The GHES code may be in interrupt context. This
complicated the use of a callback. Dan Williams suggested the use of
work items as an atomic way of switching between the callback execution
and a default handler.[1]
The use of a kfifo simplifies queue processing by providing lock free
fifo operations. cxl_cper_kfifo_get() allows easier management of the
kfifo between the ghes and cxl modules.
CXL 3.1 Table 8-127 requires a device to have a queue depth of 1 for
each of the four event logs. A combined queue depth of 32 is chosen to
provide room for 8 entries of each log type.
Add GHES support to detect CXL CPER records. Add the ability for the
CXL sub-system to register a work queue to process the events.
This patch adds back the functionality which was removed to fix the
report by Dan Carpenter[2].
[0]
Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
[1]
Link: https://lore.kernel.org/all/65d111eb87115_6c745294ac@dwillia2-xfh.jf.intel.com.notmuch/
[2]
Link: https://lore.kernel.org/all/b963c490-2c13-4b79-bbe7-34c6568423c7@moroto.mountain/
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Suggested-by: Dan Carpenter <dan.carpenter@linaro.org>
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes:
[iweiny: fix checkpatch errors despite formatting changes in if
statement]
[djbw: better define the choice of 32 kfifo entries]
[djbw: let CXL layer declare work struct and handle sync to simplify
GHES code]
---
drivers/acpi/apei/ghes.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++
include/linux/cxl-event.h | 27 ++++++++++++
2 files changed, 137 insertions(+)
diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
index 512067cac170..2247a1535b52 100644
--- a/drivers/acpi/apei/ghes.c
+++ b/drivers/acpi/apei/ghes.c
@@ -26,6 +26,8 @@
#include <linux/interrupt.h>
#include <linux/timer.h>
#include <linux/cper.h>
+#include <linux/cleanup.h>
+#include <linux/cxl-event.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/ratelimit.h>
@@ -33,6 +35,7 @@
#include <linux/irq_work.h>
#include <linux/llist.h>
#include <linux/genalloc.h>
+#include <linux/kfifo.h>
#include <linux/pci.h>
#include <linux/pfn.h>
#include <linux/aer.h>
@@ -673,6 +676,101 @@ static void ghes_defer_non_standard_event(struct acpi_hest_generic_data *gdata,
schedule_work(&entry->work);
}
+/* CXL Event record UUIDs are formated as GUIDs and reported in section type */
+
+/*
+ * General Media Event Record
+ * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
+ */
+#define CPER_SEC_CXL_GEN_MEDIA_GUID \
+ GUID_INIT(0xfbcd0a77, 0xc260, 0x417f, \
+ 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6)
+
+/*
+ * DRAM Event Record
+ * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
+ */
+#define CPER_SEC_CXL_DRAM_GUID \
+ GUID_INIT(0x601dcbb3, 0x9c06, 0x4eab, \
+ 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24)
+
+/*
+ * Memory Module Event Record
+ * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
+ */
+#define CPER_SEC_CXL_MEM_MODULE_GUID \
+ GUID_INIT(0xfe927475, 0xdd59, 0x4339, \
+ 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74)
+
+/* Room for 8 entries for each of the 4 event log queues */
+#define CXL_CPER_FIFO_DEPTH 32
+DEFINE_KFIFO(cxl_cper_fifo, struct cxl_cper_work_data, CXL_CPER_FIFO_DEPTH);
+
+/* Synchronize schedule_work() with cxl_cper_work changes */
+static DEFINE_SPINLOCK(cxl_cper_work_lock);
+struct work_struct *cxl_cper_work;
+
+static void cxl_cper_post_event(enum cxl_event_type event_type,
+ struct cxl_cper_event_rec *rec)
+{
+ struct cxl_cper_work_data wd;
+
+ if (rec->hdr.length <= sizeof(rec->hdr) ||
+ rec->hdr.length > sizeof(*rec)) {
+ pr_err(FW_WARN "CXL CPER Invalid section length (%u)\n",
+ rec->hdr.length);
+ return;
+ }
+
+ if (!(rec->hdr.validation_bits & CPER_CXL_COMP_EVENT_LOG_VALID)) {
+ pr_err(FW_WARN "CXL CPER invalid event\n");
+ return;
+ }
+
+ guard(spinlock_irqsave)(&cxl_cper_work_lock);
+
+ if (!cxl_cper_work)
+ return;
+
+ wd.event_type = event_type;
+ memcpy(&wd.rec, rec, sizeof(wd.rec));
+
+ if (!kfifo_put(&cxl_cper_fifo, wd)) {
+ pr_err_ratelimited("CXL CPER kfifo overflow\n");
+ return;
+ }
+
+ schedule_work(cxl_cper_work);
+}
+
+int cxl_cper_register_work(struct work_struct *work)
+{
+ if (cxl_cper_work)
+ return -EINVAL;
+
+ guard(spinlock)(&cxl_cper_work_lock);
+ cxl_cper_work = work;
+ return 0;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_cper_register_work, CXL);
+
+int cxl_cper_unregister_work(struct work_struct *work)
+{
+ if (cxl_cper_work != work)
+ return -EINVAL;
+
+ guard(spinlock)(&cxl_cper_work_lock);
+ cxl_cper_work = NULL;
+ return 0;
+}
+EXPORT_SYMBOL_NS_GPL(cxl_cper_unregister_work, CXL);
+
+int cxl_cper_kfifo_get(struct cxl_cper_work_data *wd)
+{
+ return kfifo_get(&cxl_cper_fifo, wd);
+}
+EXPORT_SYMBOL_NS_GPL(cxl_cper_kfifo_get, CXL);
+
static bool ghes_do_proc(struct ghes *ghes,
const struct acpi_hest_generic_status *estatus)
{
@@ -707,6 +805,18 @@ static bool ghes_do_proc(struct ghes *ghes,
}
else if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {
queued = ghes_handle_arm_hw_error(gdata, sev, sync);
+ } else if (guid_equal(sec_type, &CPER_SEC_CXL_GEN_MEDIA_GUID)) {
+ struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata);
+
+ cxl_cper_post_event(CXL_CPER_EVENT_GEN_MEDIA, rec);
+ } else if (guid_equal(sec_type, &CPER_SEC_CXL_DRAM_GUID)) {
+ struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata);
+
+ cxl_cper_post_event(CXL_CPER_EVENT_DRAM, rec);
+ } else if (guid_equal(sec_type, &CPER_SEC_CXL_MEM_MODULE_GUID)) {
+ struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata);
+
+ cxl_cper_post_event(CXL_CPER_EVENT_MEM_MODULE, rec);
} else {
void *err = acpi_hest_get_payload(gdata);
diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h
index 03fa6d50d46f..a0067c49e2ca 100644
--- a/include/linux/cxl-event.h
+++ b/include/linux/cxl-event.h
@@ -3,6 +3,8 @@
#ifndef _LINUX_CXL_EVENT_H
#define _LINUX_CXL_EVENT_H
+#include <linux/workqueue_types.h>
+
/*
* Common Event Record Format
* CXL rev 3.0 section 8.2.9.2.1; Table 8-42
@@ -140,4 +142,29 @@ struct cxl_cper_event_rec {
union cxl_event event;
} __packed;
+struct cxl_cper_work_data {
+ enum cxl_event_type event_type;
+ struct cxl_cper_event_rec rec;
+};
+
+#ifdef CONFIG_ACPI_APEI_GHES
+int cxl_cper_register_work(struct work_struct *work);
+int cxl_cper_unregister_work(struct work_struct *work);
+int cxl_cper_kfifo_get(struct cxl_cper_work_data *wd);
+#else
+static inline int cxl_cper_register_work(struct work_struct *work);
+{
+ return 0;
+}
+
+static inline int cxl_cper_unregister_work(struct work_struct *work);
+{
+ return 0;
+}
+static inline int cxl_cper_kfifo_get(struct cxl_cper_work_data *wd)
+{
+ return 0;
+}
+#endif
+
#endif /* _LINUX_CXL_EVENT_H */
--
2.44.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v3 2/2] cxl/pci: Process CPER events
2024-04-26 20:02 [PATCH v3 0/2] efi/cxl-cper: Report CXL CPER events through tracing Ira Weiny
2024-04-26 20:02 ` [PATCH v3 1/2] acpi/ghes: Process CXL Component Events Ira Weiny
@ 2024-04-26 20:03 ` Ira Weiny
2024-04-26 23:52 ` Dan Williams
1 sibling, 1 reply; 6+ messages in thread
From: Ira Weiny @ 2024-04-26 20:03 UTC (permalink / raw)
To: Dave Jiang, Dan Williams, Jonathan Cameron, Smita Koralahalli,
Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny
If the firmware has configured CXL event support to be firmware first
the OS will receive those events through CPER records. The CXL layer has
unique DPA to HPA knowledge and existing event trace parsing in
place.[0]
Add a CXL CPER work item and register it with the GHES code to process
CPER events.
[0]
Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes:
[djbw: declare work struct here]
---
drivers/cxl/pci.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 2ff361e756d6..74876c9835e8 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -974,6 +974,75 @@ static struct pci_driver cxl_pci_driver = {
},
};
-module_pci_driver(cxl_pci_driver);
+#define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0)
+static void cxl_handle_cper_event(enum cxl_event_type ev_type,
+ struct cxl_cper_event_rec *rec)
+{
+ struct cper_cxl_event_devid *device_id = &rec->hdr.device_id;
+ struct pci_dev *pdev __free(pci_dev_put) = NULL;
+ enum cxl_event_log_type log_type;
+ struct cxl_dev_state *cxlds;
+ unsigned int devfn;
+ u32 hdr_flags;
+
+ pr_debug("CPER event %d for device %u:%u:%u.%u\n", ev_type,
+ device_id->segment_num, device_id->bus_num,
+ device_id->device_num, device_id->func_num);
+
+ devfn = PCI_DEVFN(device_id->device_num, device_id->func_num);
+ pdev = pci_get_domain_bus_and_slot(device_id->segment_num,
+ device_id->bus_num, devfn);
+ if (!pdev)
+ return;
+
+ guard(device)(&pdev->dev);
+ if (pdev->driver != &cxl_pci_driver)
+ return;
+
+ cxlds = pci_get_drvdata(pdev);
+ if (!cxlds)
+ return;
+
+ /* Fabricate a log type */
+ hdr_flags = get_unaligned_le24(rec->event.generic.hdr.flags);
+ log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags);
+
+ cxl_event_trace_record(cxlds->cxlmd, log_type, ev_type,
+ &uuid_null, &rec->event);
+}
+
+static void cxl_cper_work_fn(struct work_struct *work)
+{
+ struct cxl_cper_work_data wd;
+
+ while (cxl_cper_kfifo_get(&wd))
+ cxl_handle_cper_event(wd.event_type, &wd.rec);
+}
+static DECLARE_WORK(cxl_cper_work, cxl_cper_work_fn);
+
+static int __init cxl_pci_driver_init(void)
+{
+ int rc;
+
+ rc = pci_register_driver(&cxl_pci_driver);
+ if (rc)
+ return rc;
+
+ rc = cxl_cper_register_work(&cxl_cper_work);
+ if (rc)
+ pci_unregister_driver(&cxl_pci_driver);
+
+ return rc;
+}
+
+static void __exit cxl_pci_driver_exit(void)
+{
+ cxl_cper_unregister_work(&cxl_cper_work);
+ cancel_work_sync(&cxl_cper_work);
+ pci_unregister_driver(&cxl_pci_driver);
+}
+
+module_init(cxl_pci_driver_init);
+module_exit(cxl_pci_driver_exit);
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(CXL);
--
2.44.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] acpi/ghes: Process CXL Component Events
2024-04-26 20:02 ` [PATCH v3 1/2] acpi/ghes: Process CXL Component Events Ira Weiny
@ 2024-04-26 23:50 ` Dan Williams
2024-04-27 3:31 ` Ira Weiny
0 siblings, 1 reply; 6+ messages in thread
From: Dan Williams @ 2024-04-26 23:50 UTC (permalink / raw)
To: Ira Weiny, Dave Jiang, Dan Williams, Jonathan Cameron,
Smita Koralahalli, Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny, Rafael J. Wysocki, Tony Luck, Borislav Petkov
Ira Weiny wrote:
> BIOS can configure memory devices as firmware first. This will send CXL
> events to the firmware instead of the OS. The firmware can then inform
> the OS of these events via UEFI.
>
> UEFI v2.10 section N.2.14 defines a Common Platform Error Record (CPER)
> format for CXL Component Events. The format is mostly the same as the
> CXL Common Event Record Format. The difference lies in the use of a
> GUID as the CPER Section Type which matches the UUID defined in CXL 3.1
> Table 8-43.
>
> Currently a configuration such as this will trace a non standard event
> in the log omitting useful details of the event. In addition the CXL
> sub-system contains additional region and HPA information useful to the
> user.[0]
>
> The CXL code is required to be called from process context as it needs
> to take a device lock. The GHES code may be in interrupt context. This
> complicated the use of a callback. Dan Williams suggested the use of
> work items as an atomic way of switching between the callback execution
> and a default handler.[1]
>
> The use of a kfifo simplifies queue processing by providing lock free
> fifo operations. cxl_cper_kfifo_get() allows easier management of the
> kfifo between the ghes and cxl modules.
>
> CXL 3.1 Table 8-127 requires a device to have a queue depth of 1 for
> each of the four event logs. A combined queue depth of 32 is chosen to
> provide room for 8 entries of each log type.
>
> Add GHES support to detect CXL CPER records. Add the ability for the
> CXL sub-system to register a work queue to process the events.
>
> This patch adds back the functionality which was removed to fix the
> report by Dan Carpenter[2].
>
> [0]
> Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
> [1]
> Link: https://lore.kernel.org/all/65d111eb87115_6c745294ac@dwillia2-xfh.jf.intel.com.notmuch/
> [2]
> Link: https://lore.kernel.org/all/b963c490-2c13-4b79-bbe7-34c6568423c7@moroto.mountain/
Like I mentioned last time, perhaps Dave can reformat these lines on
applying to:
Link: http://lore.kernel.org/r/cover.1711598777.git.alison.schofield@intel.com [0]
Link: http://lore.kernel.org/r/65d111eb87115_6c745294ac@dwillia2-xfh.jf.intel.com.notmuch [1]
Link: http://lore.kernel.org/r/b963c490-2c13-4b79-bbe7-34c6568423c7@moroto.mountain [2]
Other than that, this looks good to me:
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 2/2] cxl/pci: Process CPER events
2024-04-26 20:03 ` [PATCH v3 2/2] cxl/pci: Process CPER events Ira Weiny
@ 2024-04-26 23:52 ` Dan Williams
0 siblings, 0 replies; 6+ messages in thread
From: Dan Williams @ 2024-04-26 23:52 UTC (permalink / raw)
To: Ira Weiny, Dave Jiang, Dan Williams, Jonathan Cameron,
Smita Koralahalli, Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny
Ira Weiny wrote:
> If the firmware has configured CXL event support to be firmware first
> the OS will receive those events through CPER records. The CXL layer has
> unique DPA to HPA knowledge and existing event trace parsing in
> place.[0]
>
> Add a CXL CPER work item and register it with the GHES code to process
> CPER events.
>
> [0]
> Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
Link: http://lore.kernel.org/r/cover.1711598777.git.alison.schofield@intel.com [0]
Otherwise, looks good,
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3 1/2] acpi/ghes: Process CXL Component Events
2024-04-26 23:50 ` Dan Williams
@ 2024-04-27 3:31 ` Ira Weiny
0 siblings, 0 replies; 6+ messages in thread
From: Ira Weiny @ 2024-04-27 3:31 UTC (permalink / raw)
To: Dan Williams, Ira Weiny, Dave Jiang, Jonathan Cameron,
Smita Koralahalli, Shiju Jose
Cc: Dan Carpenter, Yazen Ghannam, Davidlohr Bueso, Alison Schofield,
Vishal Verma, Ard Biesheuvel, linux-efi, linux-kernel, linux-cxl,
Ira Weiny, Rafael J. Wysocki, Tony Luck, Borislav Petkov
Dan Williams wrote:
> Ira Weiny wrote:
[snip]
> >
> > [0]
> > Link: https://lore.kernel.org/all/cover.1711598777.git.alison.schofield@intel.com/
> > [1]
> > Link: https://lore.kernel.org/all/65d111eb87115_6c745294ac@dwillia2-xfh.jf.intel.com.notmuch/
> > [2]
> > Link: https://lore.kernel.org/all/b963c490-2c13-4b79-bbe7-34c6568423c7@moroto.mountain/
>
> Like I mentioned last time, perhaps Dave can reformat these lines on
> applying to:
Yes you did and I rushed these out today.
>
> Link: http://lore.kernel.org/r/cover.1711598777.git.alison.schofield@intel.com [0]
> Link: http://lore.kernel.org/r/65d111eb87115_6c745294ac@dwillia2-xfh.jf.intel.com.notmuch [1]
> Link: http://lore.kernel.org/r/b963c490-2c13-4b79-bbe7-34c6568423c7@moroto.mountain [2]
>
> Other than that, this looks good to me:
>
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Wow! B4 actually picked these up and added them for me!
I'll respin v4 is like 5 min.
Thanks for the review,
Ira
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-04-27 3:31 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-04-26 20:02 [PATCH v3 0/2] efi/cxl-cper: Report CXL CPER events through tracing Ira Weiny
2024-04-26 20:02 ` [PATCH v3 1/2] acpi/ghes: Process CXL Component Events Ira Weiny
2024-04-26 23:50 ` Dan Williams
2024-04-27 3:31 ` Ira Weiny
2024-04-26 20:03 ` [PATCH v3 2/2] cxl/pci: Process CPER events Ira Weiny
2024-04-26 23:52 ` Dan Williams
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.