From: Stephen Warren <swarren@wwwdotorg.org>
To: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linus.walleij@linaro.org, nicolas.ferre@atmel.com
Subject: Re: [RESEND PATCH 2/2] pinctrl: introduce complex pin description
Date: Mon, 15 Jun 2015 10:01:29 -0600 [thread overview]
Message-ID: <557EF6D9.6050503@wwwdotorg.org> (raw)
In-Reply-To: <1433948699-19800-3-git-send-email-ludovic.desroches@atmel.com>
On 06/10/2015 09:04 AM, Ludovic Desroches wrote:
> Using a string to describe a pin in the device tree can be not enough.
> Some controllers may need extra information to fully describe a pin. It
> concerns mainly controllers which have a per pin muxing approach which
> don't fit well the notions of groups and functions.
> Instead of using a pin name, a 32 bit value is used. The 16 least
> significant bits are used for the pin number. Other 16 bits can be used to
> store extra parameters.
The driver for the pin controller is supposed to provide this
information in a table. The whole point of having a driver, rather than
a table/list of raw register values in the DT, is so the driver can
provide this information at a semantic level. This information is fixed
per SoC and so make sense to put into a driver, while the board-specific
configuration varies wildly, and hence makes sense to put into DT.
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Ludovic Desroches
<ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org
Subject: Re: [RESEND PATCH 2/2] pinctrl: introduce complex pin description
Date: Mon, 15 Jun 2015 10:01:29 -0600 [thread overview]
Message-ID: <557EF6D9.6050503@wwwdotorg.org> (raw)
In-Reply-To: <1433948699-19800-3-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
On 06/10/2015 09:04 AM, Ludovic Desroches wrote:
> Using a string to describe a pin in the device tree can be not enough.
> Some controllers may need extra information to fully describe a pin. It
> concerns mainly controllers which have a per pin muxing approach which
> don't fit well the notions of groups and functions.
> Instead of using a pin name, a 32 bit value is used. The 16 least
> significant bits are used for the pin number. Other 16 bits can be used to
> store extra parameters.
The driver for the pin controller is supposed to provide this
information in a table. The whole point of having a driver, rather than
a table/list of raw register values in the DT, is so the driver can
provide this information at a semantic level. This information is fixed
per SoC and so make sense to put into a driver, while the board-specific
configuration varies wildly, and hence makes sense to put into DT.
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WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH 2/2] pinctrl: introduce complex pin description
Date: Mon, 15 Jun 2015 10:01:29 -0600 [thread overview]
Message-ID: <557EF6D9.6050503@wwwdotorg.org> (raw)
In-Reply-To: <1433948699-19800-3-git-send-email-ludovic.desroches@atmel.com>
On 06/10/2015 09:04 AM, Ludovic Desroches wrote:
> Using a string to describe a pin in the device tree can be not enough.
> Some controllers may need extra information to fully describe a pin. It
> concerns mainly controllers which have a per pin muxing approach which
> don't fit well the notions of groups and functions.
> Instead of using a pin name, a 32 bit value is used. The 16 least
> significant bits are used for the pin number. Other 16 bits can be used to
> store extra parameters.
The driver for the pin controller is supposed to provide this
information in a table. The whole point of having a driver, rather than
a table/list of raw register values in the DT, is so the driver can
provide this information at a semantic level. This information is fixed
per SoC and so make sense to put into a driver, while the board-specific
configuration varies wildly, and hence makes sense to put into DT.
next prev parent reply other threads:[~2015-06-15 16:01 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-10 15:04 [RESEND PATCH 0/2] get pinctrl more flexible for per pin muxing controllers Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` [RESEND PATCH 1/2] pinctrl: change function behavior " Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-15 15:58 ` Stephen Warren
2015-06-15 15:58 ` Stephen Warren
2015-06-15 15:58 ` Stephen Warren
2015-06-17 12:38 ` Ludovic Desroches
2015-06-17 12:38 ` Ludovic Desroches
2015-06-17 12:38 ` Ludovic Desroches
2015-06-17 15:55 ` Stephen Warren
2015-06-17 15:55 ` Stephen Warren
2015-06-18 12:33 ` Ludovic Desroches
2015-06-18 12:33 ` Ludovic Desroches
2015-06-18 12:33 ` Ludovic Desroches
2015-07-14 5:57 ` Sascha Hauer
2015-07-14 5:57 ` Sascha Hauer
2015-07-15 7:46 ` Ludovic Desroches
2015-07-15 7:46 ` Ludovic Desroches
2015-07-15 7:46 ` Ludovic Desroches
2015-07-15 8:29 ` Ludovic Desroches
2015-07-15 8:29 ` Ludovic Desroches
2015-07-15 8:29 ` Ludovic Desroches
2015-07-27 9:43 ` Linus Walleij
2015-07-27 9:43 ` Linus Walleij
2015-07-27 12:12 ` Ludovic Desroches
2015-07-27 12:12 ` Ludovic Desroches
2015-06-30 9:17 ` Nicolas Ferre
2015-06-30 9:17 ` Nicolas Ferre
2015-06-30 9:17 ` Nicolas Ferre
2015-07-13 12:07 ` Linus Walleij
2015-07-13 12:07 ` Linus Walleij
2015-07-13 12:07 ` Linus Walleij
2015-07-14 6:54 ` Sascha Hauer
2015-07-14 6:54 ` Sascha Hauer
2015-07-13 12:13 ` Linus Walleij
2015-07-13 12:13 ` Linus Walleij
2015-06-10 15:04 ` [RESEND PATCH 2/2] pinctrl: introduce complex pin description Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-15 16:01 ` Stephen Warren [this message]
2015-06-15 16:01 ` Stephen Warren
2015-06-15 16:01 ` Stephen Warren
2015-06-17 12:42 ` Ludovic Desroches
2015-06-17 12:42 ` Ludovic Desroches
2015-06-17 12:42 ` Ludovic Desroches
2015-07-14 6:13 ` Sascha Hauer
2015-07-14 6:13 ` Sascha Hauer
2015-07-15 8:45 ` Ludovic Desroches
2015-07-15 8:45 ` Ludovic Desroches
2015-07-15 8:45 ` Ludovic Desroches
2015-07-15 10:05 ` Sascha Hauer
2015-07-15 10:05 ` Sascha Hauer
2015-07-15 13:52 ` Ludovic Desroches
2015-07-15 13:52 ` Ludovic Desroches
2015-07-15 13:52 ` Ludovic Desroches
2015-06-10 15:04 ` [RESEND PROTO] pinctrl: rough draft for a future controller Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` [RESEND PROTO] ARM: at91/dt: proto dt Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
2015-06-10 15:04 ` Ludovic Desroches
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