From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 07/10] limit number of VCPUs on demand
Date: Wed, 17 Jun 2015 14:14:52 +0100 [thread overview]
Message-ID: <558172CC.3050601@arm.com> (raw)
In-Reply-To: <55816DC6.4060604@arm.com>
On 06/17/2015 01:53 PM, Marc Zyngier wrote:
> On 17/06/15 12:21, Andre Przywara wrote:
>> Currently the ARM GIC checks the number of VCPUs against a fixed
>> limit, which is GICv2 specific. Don't pretend we know better than the
>> kernel and let's get rid of that explicit check.
>> Instead be more relaxed about KVM_CREATE_VCPU failing with EINVAL,
>> which is the way the kernel communicates having reached a VCPU limit.
>> If we see this and have at least brought up one VCPU already
>> successfully, then don't panic, but limit the number of VCPUs instead.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
...
>> diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c
>> index 7780251..c1cf51d 100644
>> --- a/arm/kvm-cpu.c
>> +++ b/arm/kvm-cpu.c
>> @@ -47,12 +47,19 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
>> };
>>
>> vcpu = calloc(1, sizeof(struct kvm_cpu));
>> - if (!vcpu)
>> + if (!vcpu) {
>> + errno = ENOMEM;
>> return NULL;
>> + }
>
> Isn't errno already set when calloc fails?
Ah yes, that seems to be true at least for glibc or UNIX 98, according
to the manpage. I was misguided by the fact that calloc is not a
syscall. So I can drop this hunk.
Thanks,
Andre.
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>, Will Deacon <Will.Deacon@arm.com>
Cc: "penberg@kernel.org" <penberg@kernel.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 07/10] limit number of VCPUs on demand
Date: Wed, 17 Jun 2015 14:14:52 +0100 [thread overview]
Message-ID: <558172CC.3050601@arm.com> (raw)
In-Reply-To: <55816DC6.4060604@arm.com>
On 06/17/2015 01:53 PM, Marc Zyngier wrote:
> On 17/06/15 12:21, Andre Przywara wrote:
>> Currently the ARM GIC checks the number of VCPUs against a fixed
>> limit, which is GICv2 specific. Don't pretend we know better than the
>> kernel and let's get rid of that explicit check.
>> Instead be more relaxed about KVM_CREATE_VCPU failing with EINVAL,
>> which is the way the kernel communicates having reached a VCPU limit.
>> If we see this and have at least brought up one VCPU already
>> successfully, then don't panic, but limit the number of VCPUs instead.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
...
>> diff --git a/arm/kvm-cpu.c b/arm/kvm-cpu.c
>> index 7780251..c1cf51d 100644
>> --- a/arm/kvm-cpu.c
>> +++ b/arm/kvm-cpu.c
>> @@ -47,12 +47,19 @@ struct kvm_cpu *kvm_cpu__arch_init(struct kvm *kvm, unsigned long cpu_id)
>> };
>>
>> vcpu = calloc(1, sizeof(struct kvm_cpu));
>> - if (!vcpu)
>> + if (!vcpu) {
>> + errno = ENOMEM;
>> return NULL;
>> + }
>
> Isn't errno already set when calloc fails?
Ah yes, that seems to be true at least for glibc or UNIX 98, according
to the manpage. I was misguided by the fact that calloc is not a
syscall. So I can drop this hunk.
Thanks,
Andre.
next prev parent reply other threads:[~2015-06-17 13:14 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-17 11:21 [PATCH v3 00/10] kvmtool: arm64: GICv3 guest support Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 01/10] AArch64: Reserve two 64k pages for GIC CPU interface Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 02/10] AArch{32, 64}: use KVM_CREATE_DEVICE & co to instanciate the GIC Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 03/10] irq: add irq__get_nr_allocated_lines Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 04/10] AArch{32, 64}: dynamically configure the number of GIC interrupts Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 05/10] arm: finish VGIC initialisation explicitly Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 06/10] arm: simplify MMIO dispatching Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 12:48 ` Marc Zyngier
2015-06-17 12:48 ` Marc Zyngier
2015-06-17 13:49 ` Andre Przywara
2015-06-17 13:49 ` Andre Przywara
2015-06-17 14:06 ` Marc Zyngier
2015-06-17 14:06 ` Marc Zyngier
2015-06-24 13:30 ` Andre Przywara
2015-06-24 13:30 ` Andre Przywara
2015-06-24 17:56 ` Will Deacon
2015-06-24 17:56 ` Will Deacon
2015-06-17 11:21 ` [PATCH v3 07/10] limit number of VCPUs on demand Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 12:53 ` Marc Zyngier
2015-06-17 12:53 ` Marc Zyngier
2015-06-17 13:14 ` Andre Przywara [this message]
2015-06-17 13:14 ` Andre Przywara
2015-06-17 11:21 ` [PATCH v3 08/10] arm: prepare for instantiating different IRQ chip devices Andre Przywara
2015-06-17 11:21 ` Andre Przywara
2015-06-17 13:06 ` Marc Zyngier
2015-06-17 13:06 ` Marc Zyngier
2015-06-17 11:22 ` [PATCH v3 09/10] arm: add support for supplying GICv3 redistributor addresses Andre Przywara
2015-06-17 11:22 ` Andre Przywara
2015-06-17 13:09 ` Marc Zyngier
2015-06-17 13:09 ` Marc Zyngier
2015-06-17 11:22 ` [PATCH v3 10/10] arm: use new irqchip parameter to create different vGIC types Andre Przywara
2015-06-17 11:22 ` Andre Przywara
2015-06-17 13:16 ` Marc Zyngier
2015-06-17 13:16 ` Marc Zyngier
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