From: Markos Chandras <Markos.Chandras@imgtec.com>
To: Paul Burton <paul.burton@imgtec.com>
Cc: <linux-mips@linux-mips.org>, <stable@vger.kernel.org>
Subject: Re: [PATCH 6/7] MIPS: kernel: cps-vec: Use macros for various arithmetics and memory operations
Date: Tue, 14 Jul 2015 14:07:36 +0100 [thread overview]
Message-ID: <55A50998.4030308@imgtec.com> (raw)
In-Reply-To: <20150714124011.GH2519@NP-P-BURTON>
On 07/14/2015 01:40 PM, Paul Burton wrote:
>> @@ -152,7 +152,7 @@ dcache_done:
>>
>> /* Enter the coherent domain */
>> li t0, 0xff
>> - sw t0, GCR_CL_COHERENCE_OFS(v1)
>> + PTR_S t0, GCR_CL_COHERENCE_OFS(v1)
>
> Hi Markos,
>
> I don't believe this is correct where accessing GCRs. Since you've
> pushed elsewhere to perform 32 bit accesses when running a 32 bit kernel
> on a MIPS64 core with CM3, can we just keep doing 32 bit accesses here?
>
Hi Paul,
Yes. This patch is already upstream though. I will wait for the
'mips_cm_is64' to make it upstream as well and then I will submit a fix
for this one. It should not break anything at the moment. Thanks
--
markos
WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <Markos.Chandras@imgtec.com>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, stable@vger.kernel.org
Subject: Re: [PATCH 6/7] MIPS: kernel: cps-vec: Use macros for various arithmetics and memory operations
Date: Tue, 14 Jul 2015 14:07:36 +0100 [thread overview]
Message-ID: <55A50998.4030308@imgtec.com> (raw)
Message-ID: <20150714130736.UjDJ-PbBcGJ0gdo4rZGC-BFiXZWZuULyzQoktKntRLM@z> (raw)
In-Reply-To: <20150714124011.GH2519@NP-P-BURTON>
On 07/14/2015 01:40 PM, Paul Burton wrote:
>> @@ -152,7 +152,7 @@ dcache_done:
>>
>> /* Enter the coherent domain */
>> li t0, 0xff
>> - sw t0, GCR_CL_COHERENCE_OFS(v1)
>> + PTR_S t0, GCR_CL_COHERENCE_OFS(v1)
>
> Hi Markos,
>
> I don't believe this is correct where accessing GCRs. Since you've
> pushed elsewhere to perform 32 bit accesses when running a 32 bit kernel
> on a MIPS64 core with CM3, can we just keep doing 32 bit accesses here?
>
Hi Paul,
Yes. This patch is already upstream though. I will wait for the
'mips_cm_is64' to make it upstream as well and then I will submit a fix
for this one. It should not break anything at the moment. Thanks
--
markos
next prev parent reply other threads:[~2015-07-14 13:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-01 8:13 [PATCH 0/7] Initial SMP/CPS 64-bit support Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 1/7] MIPS: kernel: smp-cps: Fix 64-bit compatibility errors due to pointer casting Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 2/7] MIPS: kernel: cps-vec: Replace 'la' macro with PTR_LA Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 3/7] MIPS: kernel: cps-vec: Replace mips32r2 ISA level with mips64r2 Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 4/7] MIPS: kernel: cps-vec: Use ta0-ta3 pseudo-registers for 64-bit Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 5/7] MIPS: kernel: cps-vec: Replace KSEG0 with CKSEG0 Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-01 8:13 ` [PATCH 6/7] MIPS: kernel: cps-vec: Use macros for various arithmetics and memory operations Markos Chandras
2015-07-01 8:13 ` Markos Chandras
2015-07-14 12:40 ` Paul Burton
2015-07-14 12:40 ` Paul Burton
2015-07-14 13:07 ` Markos Chandras [this message]
2015-07-14 13:07 ` Markos Chandras
2015-07-01 8:31 ` [PATCH 7/7] Revert "MIPS: Kconfig: Disable SMP/CPS for 64-bit" Markos Chandras
2015-07-01 8:31 ` Markos Chandras
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