From: "Yankejian (Hackim Yim)" <yankejian@huawei.com>
To: Rob Herring <robh@kernel.org>
Cc: <davem@davemloft.net>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <xuwei5@hisilicon.com>,
<catalin.marinas@arm.com>, <will.deacon@arm.com>,
<wangkefeng.wang@huawei.com>, <dingtianhong@huawei.com>,
<liguozhu@huawei.com>, <Yisen.Zhuang@huawei.com>,
<sboyd@codeaurora.org>, <haojian.zhuang@linaro.org>,
<wangzhou1@hisilicon.com>, <bintian.wang@huawei.com>,
<long.wanglong@huawei.com>, <leo.yan@linaro.org>,
<haifeng.wei@huawei.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>,
<linuxarm@huawei.com>
Subject: Re: [PATCH v2 next 1/2] dts: hisi: fixes no syscon error when init mdio
Date: Wed, 9 Dec 2015 18:52:12 +0800 [thread overview]
Message-ID: <566807DC.8030107@huawei.com> (raw)
In-Reply-To: <20151208152514.GA27037@rob-hp-laptop>
On 2015/12/8 23:25, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 04:25:06PM +0800, yankejian wrote:
>> Signed-nux start up, we get the log below:
>> "Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
>> mdio_bus mdio@803c0000: mdio sys ctl reg has not maped "
>>
>> the source code about the subctrl is dealled with syscon, but dts doesn't.
> The source...
>
> s/dealled/dealt/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>> it cause such fault. so this patch adds the syscon info on dts files to
>> fixes it. and it adds documentation for the devicetree bindings used by
> Capitalization please.
Thanks a lot for pointing it out. i will pay attention to that next time.
Best Regards,
yankejian
>> DT files of Hisilicon Hip05-D02 development board.
>>
>> Signed-off-by: yankejian <yankejian@huawei.com>
>> ---
>> change log:
>> v2:
>> 1) updates the related documented in the binding as well
>> 2) use the normal naming conventions using '-' instead of '_'
>>
>> v1:
>> initial version
>> ---
>> .../devicetree/bindings/arm/hisilicon/hisilicon.txt | 16 ++++++++++++++++
>> arch/arm64/boot/dts/hisilicon/hip05.dtsi | 5 +++++
>> arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 4 ++--
>> 3 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 6ac7c00..9f05767 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -187,6 +187,22 @@ Example:
>> reg = <0xb0000000 0x10000>;
>> };
>>
>> +Hisilicon HiP05 PERISUB system controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> +controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> + /* for HiP05 PCIe-SAS system */
>> + peri-c-subctrl: sub-ctrl-c@80000000 {
> s/sub-ctrl-c/syscon/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = <0x0 0x80000000 0x0 0x10000>;
>> + };
>> -----------------------------------------------------------------------
>> Hisilicon CPU controller
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> index 4ff16d0..5fec740 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> @@ -246,6 +246,11 @@
>> clock-frequency = <200000000>;
>> };
>>
>> + peri_c_subctrl: sub-ctrl-c@80000000 {
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = < 0x0 0x80000000 0x0 0x10000>;
>> + };
>> +
>> uart0: uart@80300000 {
>> compatible = "snps,dw-apb-uart";
>> reg = <0x0 0x80300000 0x0 0x10000>;
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> index 606dd5a..da7b6e6 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> @@ -10,8 +10,8 @@ soc0: soc@000000000 {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> compatible = "hisilicon,hns-mdio";
>> - reg = <0x0 0x803c0000 0x0 0x10000
>> - 0x0 0x80000000 0x0 0x10000>;
>> + reg = <0x0 0x803c0000 0x0 0x10000>;
>> + subctrl-vbase = <&peri_c_subctrl>;
>>
>> soc0_phy0: ethernet-phy@0 {
>> reg = <0x0>;
>> --
>> 1.9.1
>>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: "Yankejian (Hackim Yim)" <yankejian-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
liguozhu-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
Yisen.Zhuang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
bintian.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
long.wanglong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
haifeng.wei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH v2 next 1/2] dts: hisi: fixes no syscon error when init mdio
Date: Wed, 9 Dec 2015 18:52:12 +0800 [thread overview]
Message-ID: <566807DC.8030107@huawei.com> (raw)
In-Reply-To: <20151208152514.GA27037@rob-hp-laptop>
On 2015/12/8 23:25, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 04:25:06PM +0800, yankejian wrote:
>> Signed-nux start up, we get the log below:
>> "Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
>> mdio_bus mdio@803c0000: mdio sys ctl reg has not maped "
>>
>> the source code about the subctrl is dealled with syscon, but dts doesn't.
> The source...
>
> s/dealled/dealt/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>> it cause such fault. so this patch adds the syscon info on dts files to
>> fixes it. and it adds documentation for the devicetree bindings used by
> Capitalization please.
Thanks a lot for pointing it out. i will pay attention to that next time.
Best Regards,
yankejian
>> DT files of Hisilicon Hip05-D02 development board.
>>
>> Signed-off-by: yankejian <yankejian-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> change log:
>> v2:
>> 1) updates the related documented in the binding as well
>> 2) use the normal naming conventions using '-' instead of '_'
>>
>> v1:
>> initial version
>> ---
>> .../devicetree/bindings/arm/hisilicon/hisilicon.txt | 16 ++++++++++++++++
>> arch/arm64/boot/dts/hisilicon/hip05.dtsi | 5 +++++
>> arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 4 ++--
>> 3 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 6ac7c00..9f05767 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -187,6 +187,22 @@ Example:
>> reg = <0xb0000000 0x10000>;
>> };
>>
>> +Hisilicon HiP05 PERISUB system controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> +controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> + /* for HiP05 PCIe-SAS system */
>> + peri-c-subctrl: sub-ctrl-c@80000000 {
> s/sub-ctrl-c/syscon/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = <0x0 0x80000000 0x0 0x10000>;
>> + };
>> -----------------------------------------------------------------------
>> Hisilicon CPU controller
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> index 4ff16d0..5fec740 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> @@ -246,6 +246,11 @@
>> clock-frequency = <200000000>;
>> };
>>
>> + peri_c_subctrl: sub-ctrl-c@80000000 {
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = < 0x0 0x80000000 0x0 0x10000>;
>> + };
>> +
>> uart0: uart@80300000 {
>> compatible = "snps,dw-apb-uart";
>> reg = <0x0 0x80300000 0x0 0x10000>;
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> index 606dd5a..da7b6e6 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> @@ -10,8 +10,8 @@ soc0: soc@000000000 {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> compatible = "hisilicon,hns-mdio";
>> - reg = <0x0 0x803c0000 0x0 0x10000
>> - 0x0 0x80000000 0x0 0x10000>;
>> + reg = <0x0 0x803c0000 0x0 0x10000>;
>> + subctrl-vbase = <&peri_c_subctrl>;
>>
>> soc0_phy0: ethernet-phy@0 {
>> reg = <0x0>;
>> --
>> 1.9.1
>>
> .
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: "Yankejian (Hackim Yim)" <yankejian-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>,
<pawel.moll-5wv7dgnIgG8@public.gmane.org>,
<mark.rutland-5wv7dgnIgG8@public.gmane.org>,
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
<galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
<xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
<catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
<will.deacon-5wv7dgnIgG8@public.gmane.org>,
<wangkefeng.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<dingtianhong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<liguozhu-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<Yisen.Zhuang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
<haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
<wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
<bintian.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<long.wanglong-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
<haifeng.wei-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
<netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
<linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH v2 next 1/2] dts: hisi: fixes no syscon error when init mdio
Date: Wed, 9 Dec 2015 18:52:12 +0800 [thread overview]
Message-ID: <566807DC.8030107@huawei.com> (raw)
In-Reply-To: <20151208152514.GA27037@rob-hp-laptop>
On 2015/12/8 23:25, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 04:25:06PM +0800, yankejian wrote:
>> Signed-nux start up, we get the log below:
>> "Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
>> mdio_bus mdio@803c0000: mdio sys ctl reg has not maped "
>>
>> the source code about the subctrl is dealled with syscon, but dts doesn't.
> The source...
>
> s/dealled/dealt/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>> it cause such fault. so this patch adds the syscon info on dts files to
>> fixes it. and it adds documentation for the devicetree bindings used by
> Capitalization please.
Thanks a lot for pointing it out. i will pay attention to that next time.
Best Regards,
yankejian
>> DT files of Hisilicon Hip05-D02 development board.
>>
>> Signed-off-by: yankejian <yankejian-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> ---
>> change log:
>> v2:
>> 1) updates the related documented in the binding as well
>> 2) use the normal naming conventions using '-' instead of '_'
>>
>> v1:
>> initial version
>> ---
>> .../devicetree/bindings/arm/hisilicon/hisilicon.txt | 16 ++++++++++++++++
>> arch/arm64/boot/dts/hisilicon/hip05.dtsi | 5 +++++
>> arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 4 ++--
>> 3 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 6ac7c00..9f05767 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -187,6 +187,22 @@ Example:
>> reg = <0xb0000000 0x10000>;
>> };
>>
>> +Hisilicon HiP05 PERISUB system controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> +controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> + /* for HiP05 PCIe-SAS system */
>> + peri-c-subctrl: sub-ctrl-c@80000000 {
> s/sub-ctrl-c/syscon/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = <0x0 0x80000000 0x0 0x10000>;
>> + };
>> -----------------------------------------------------------------------
>> Hisilicon CPU controller
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> index 4ff16d0..5fec740 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> @@ -246,6 +246,11 @@
>> clock-frequency = <200000000>;
>> };
>>
>> + peri_c_subctrl: sub-ctrl-c@80000000 {
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = < 0x0 0x80000000 0x0 0x10000>;
>> + };
>> +
>> uart0: uart@80300000 {
>> compatible = "snps,dw-apb-uart";
>> reg = <0x0 0x80300000 0x0 0x10000>;
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> index 606dd5a..da7b6e6 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> @@ -10,8 +10,8 @@ soc0: soc@000000000 {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> compatible = "hisilicon,hns-mdio";
>> - reg = <0x0 0x803c0000 0x0 0x10000
>> - 0x0 0x80000000 0x0 0x10000>;
>> + reg = <0x0 0x803c0000 0x0 0x10000>;
>> + subctrl-vbase = <&peri_c_subctrl>;
>>
>> soc0_phy0: ethernet-phy@0 {
>> reg = <0x0>;
>> --
>> 1.9.1
>>
> .
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: yankejian@huawei.com (Yankejian (Hackim Yim))
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 next 1/2] dts: hisi: fixes no syscon error when init mdio
Date: Wed, 9 Dec 2015 18:52:12 +0800 [thread overview]
Message-ID: <566807DC.8030107@huawei.com> (raw)
In-Reply-To: <20151208152514.GA27037@rob-hp-laptop>
On 2015/12/8 23:25, Rob Herring wrote:
> On Mon, Dec 07, 2015 at 04:25:06PM +0800, yankejian wrote:
>> Signed-nux start up, we get the log below:
>> "Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
>> mdio_bus mdio at 803c0000: mdio sys ctl reg has not maped "
>>
>> the source code about the subctrl is dealled with syscon, but dts doesn't.
> The source...
>
> s/dealled/dealt/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>> it cause such fault. so this patch adds the syscon info on dts files to
>> fixes it. and it adds documentation for the devicetree bindings used by
> Capitalization please.
Thanks a lot for pointing it out. i will pay attention to that next time.
Best Regards,
yankejian
>> DT files of Hisilicon Hip05-D02 development board.
>>
>> Signed-off-by: yankejian <yankejian@huawei.com>
>> ---
>> change log:
>> v2:
>> 1) updates the related documented in the binding as well
>> 2) use the normal naming conventions using '-' instead of '_'
>>
>> v1:
>> initial version
>> ---
>> .../devicetree/bindings/arm/hisilicon/hisilicon.txt | 16 ++++++++++++++++
>> arch/arm64/boot/dts/hisilicon/hip05.dtsi | 5 +++++
>> arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 4 ++--
>> 3 files changed, 23 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> index 6ac7c00..9f05767 100644
>> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
>> @@ -187,6 +187,22 @@ Example:
>> reg = <0xb0000000 0x10000>;
>> };
>>
>> +Hisilicon HiP05 PERISUB system controller
>> +
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> +controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> + /* for HiP05 PCIe-SAS system */
>> + peri-c-subctrl: sub-ctrl-c at 80000000 {
> s/sub-ctrl-c/syscon/
Thanks for pointing it out. it will be changed in patch v3.
Best Regards,
yankejian
>
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = <0x0 0x80000000 0x0 0x10000>;
>> + };
>> -----------------------------------------------------------------------
>> Hisilicon CPU controller
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> index 4ff16d0..5fec740 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
>> @@ -246,6 +246,11 @@
>> clock-frequency = <200000000>;
>> };
>>
>> + peri_c_subctrl: sub-ctrl-c at 80000000 {
>> + compatible = "hisilicon,peri-c-subctrl", "syscon";
>> + reg = < 0x0 0x80000000 0x0 0x10000>;
>> + };
>> +
>> uart0: uart at 80300000 {
>> compatible = "snps,dw-apb-uart";
>> reg = <0x0 0x80300000 0x0 0x10000>;
>> diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> index 606dd5a..da7b6e6 100644
>> --- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> +++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
>> @@ -10,8 +10,8 @@ soc0: soc at 000000000 {
>> #address-cells = <1>;
>> #size-cells = <0>;
>> compatible = "hisilicon,hns-mdio";
>> - reg = <0x0 0x803c0000 0x0 0x10000
>> - 0x0 0x80000000 0x0 0x10000>;
>> + reg = <0x0 0x803c0000 0x0 0x10000>;
>> + subctrl-vbase = <&peri_c_subctrl>;
>>
>> soc0_phy0: ethernet-phy at 0 {
>> reg = <0x0>;
>> --
>> 1.9.1
>>
> .
>
next prev parent reply other threads:[~2015-12-09 10:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-07 8:25 [PATCH v2 next 0/2] dts: hisi: fixes no syscon error when init mdio yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` [PATCH v2 next 1/2] " yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
2015-12-08 15:25 ` Rob Herring
2015-12-08 15:25 ` Rob Herring
2015-12-09 10:52 ` Yankejian (Hackim Yim) [this message]
2015-12-09 10:52 ` Yankejian (Hackim Yim)
2015-12-09 10:52 ` Yankejian (Hackim Yim)
2015-12-09 10:52 ` Yankejian (Hackim Yim)
2015-12-07 8:25 ` [PATCH v2 next 2/2] net: hns: " yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
2015-12-07 8:25 ` yankejian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=566807DC.8030107@huawei.com \
--to=yankejian@huawei.com \
--cc=Yisen.Zhuang@huawei.com \
--cc=bintian.wang@huawei.com \
--cc=catalin.marinas@arm.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=dingtianhong@huawei.com \
--cc=galak@codeaurora.org \
--cc=haifeng.wei@huawei.com \
--cc=haojian.zhuang@linaro.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=leo.yan@linaro.org \
--cc=liguozhu@huawei.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=long.wanglong@huawei.com \
--cc=mark.rutland@arm.com \
--cc=netdev@vger.kernel.org \
--cc=pawel.moll@arm.com \
--cc=robh@kernel.org \
--cc=sboyd@codeaurora.org \
--cc=wangkefeng.wang@huawei.com \
--cc=wangzhou1@hisilicon.com \
--cc=will.deacon@arm.com \
--cc=xuwei5@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.