From: "Xu, Like" <like.xu@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: Venkatesh Srinivas <venkateshs@chromium.org>,
Peter Zijlstra <peterz@infradead.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Borislav Petkov <bp@alien8.de>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
weijiang.yang@intel.com, Kan Liang <kan.liang@linux.intel.com>,
ak@linux.intel.com, wei.w.wang@intel.com, eranian@google.com,
liuxiangdong5@huawei.com, linux-kernel@vger.kernel.org,
x86@kernel.org, kvm@vger.kernel.org,
Yao Yuan <yuan.yao@intel.com>, Like Xu <like.xu@linux.intel.com>
Subject: Re: [PATCH v6 04/16] KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON bit when vPMU is enabled
Date: Tue, 18 May 2021 15:49:37 +0800 [thread overview]
Message-ID: <59aaa290-1c44-f7f5-36b7-cdc42a2f6631@intel.com> (raw)
In-Reply-To: <YKMBZ5cs2siTorf1@google.com>
On 2021/5/18 7:51, Sean Christopherson wrote:
> On Mon, May 17, 2021, Sean Christopherson wrote:
>> On Thu, May 13, 2021, Xu, Like wrote:
>>> On 2021/5/12 23:18, Sean Christopherson wrote:
>>>> On Wed, May 12, 2021, Xu, Like wrote:
>>>>> Hi Venkatesh Srinivas,
>>>>>
>>>>> On 2021/5/12 9:58, Venkatesh Srinivas wrote:
>>>>>> On 5/10/21, Like Xu <like.xu@linux.intel.com> wrote:
>>>>>>> On Intel platforms, the software can use the IA32_MISC_ENABLE[7] bit to
>>>>>>> detect whether the processor supports performance monitoring facility.
>>>>>>>
>>>>>>> It depends on the PMU is enabled for the guest, and a software write
>>>>>>> operation to this available bit will be ignored.
>>>>>> Is the behavior that writes to IA32_MISC_ENABLE[7] are ignored (rather than #GP)
>>>>>> documented someplace?
>>>>> The bit[7] behavior of the real hardware on the native host is quite
>>>>> suspicious.
>>>> Ugh. Can you file an SDM bug to get the wording and accessibility updated? The
>>>> current phrasing is a mess:
>>>>
>>>> Performance Monitoring Available (R)
>>>> 1 = Performance monitoring enabled.
>>>> 0 = Performance monitoring disabled.
>>>>
>>>> The (R) is ambiguous because most other entries that are read-only use (RO), and
>>>> the "enabled vs. disabled" implies the bit is writable and really does control
>>>> the PMU. But on my Haswell system, it's read-only.
>>> On your Haswell system, does it cause #GP or just silent if you change this
>>> bit ?
>> Attempting to clear the bit generates a #GP.
> *sigh*
>
> Venkatesh and I are exhausting our brown paper bag supply.
>
> Attempting to clear bit 7 is ignored on both Haswell and Goldmont. This _no_ #GP,
> the toggle is simply ignored. I forgot to specify hex format (multiple times),
> and Venkatesh accessed the wrong MSR (0x10a instead of 0x1a0).
*sigh*
>
> So your proposal to ignore the toggle in KVM is the way to go, but please
> document in the changelog that that behavior matches bare metal.
Thank you, I will clearly state it in the commit message.
>
> It would be nice to get the SDM cleaned up to use "supported/unsupported", and to
> pick one of (R), (RO), and (R/O) for all MSRs entries for consistency, but that
> may be a pipe dream.
Glad you could review my code. I have reported this issue internally.
>
> Sorry for the run-around :-/
next prev parent reply other threads:[~2021-05-18 7:49 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-11 2:41 [PATCH v6 00/16] KVM: x86/pmu: Add *basic* support to enable guest PEBS via DS Like Xu
2021-05-11 2:41 ` [PATCH v6 01/16] perf/x86/intel: Add EPT-Friendly PEBS for Ice Lake Server Like Xu
2021-05-11 2:42 ` [PATCH v6 02/16] perf/x86/intel: Handle guest PEBS overflow PMI for KVM guest Like Xu
2021-05-17 8:16 ` Peter Zijlstra
2021-05-18 7:38 ` Xu, Like
2021-05-18 8:37 ` Peter Zijlstra
2021-05-11 2:42 ` [PATCH v6 03/16] perf/x86/core: Pass "struct kvm_pmu *" to determine the guest values Like Xu
2021-05-11 2:42 ` [PATCH v6 04/16] KVM: x86/pmu: Set MSR_IA32_MISC_ENABLE_EMON bit when vPMU is enabled Like Xu
2021-05-12 1:58 ` Venkatesh Srinivas
2021-05-12 5:00 ` Xu, Like
2021-05-12 15:18 ` Sean Christopherson
2021-05-13 2:50 ` Xu, Like
2021-05-17 18:43 ` Venkatesh Srinivas
2021-05-17 21:19 ` Sean Christopherson
2021-05-17 21:16 ` Sean Christopherson
2021-05-17 23:51 ` Sean Christopherson
2021-05-18 7:49 ` Xu, Like [this message]
2021-05-11 2:42 ` [PATCH v6 05/16] KVM: x86/pmu: Introduce the ctrl_mask value for fixed counter Like Xu
2021-05-17 8:18 ` Peter Zijlstra
2021-05-18 7:55 ` Xu, Like
2021-05-18 8:35 ` Peter Zijlstra
2021-05-11 2:42 ` [PATCH v6 06/16] KVM: x86/pmu: Add IA32_PEBS_ENABLE MSR emulation for extended PEBS Like Xu
2021-05-17 8:32 ` Peter Zijlstra
2021-05-18 8:44 ` Xu, Like
2021-05-18 13:42 ` Peter Zijlstra
2021-05-17 8:33 ` Peter Zijlstra
2021-05-18 8:13 ` Xu, Like
2021-05-11 2:42 ` [PATCH v6 07/16] KVM: x86/pmu: Reprogram PEBS event to emulate guest PEBS counter Like Xu
2021-05-17 8:39 ` Peter Zijlstra
2021-05-17 14:44 ` Andi Kleen
2021-05-18 8:47 ` Peter Zijlstra
2021-05-18 13:15 ` Xu, Like
2021-05-18 15:58 ` Andi Kleen
2021-05-17 9:14 ` Peter Zijlstra
2021-05-18 13:28 ` Xu, Like
2021-05-18 13:36 ` Peter Zijlstra
2021-05-18 14:05 ` Xu, Like
2021-05-11 2:42 ` [PATCH v6 08/16] KVM: x86/pmu: Add IA32_DS_AREA MSR emulation to support guest DS Like Xu
2021-05-12 5:16 ` Xu, Like
2021-05-17 13:26 ` Peter Zijlstra
2021-05-17 14:50 ` Andi Kleen
2021-05-11 2:42 ` [PATCH v6 09/16] KVM: x86/pmu: Add PEBS_DATA_CFG MSR emulation to support adaptive PEBS Like Xu
2021-05-11 2:42 ` [PATCH v6 10/16] KVM: x86: Set PEBS_UNAVAIL in IA32_MISC_ENABLE when PEBS is enabled Like Xu
2021-05-11 2:42 ` [PATCH v6 11/16] KVM: x86/pmu: Adjust precise_ip to emulate Ice Lake guest PDIR counter Like Xu
2021-05-11 2:42 ` [PATCH v6 12/16] KVM: x86/pmu: Move pmc_speculative_in_use() to arch/x86/kvm/pmu.h Like Xu
2021-05-11 2:42 ` [PATCH v6 13/16] KVM: x86/pmu: Disable guest PEBS temporarily in two rare situations Like Xu
2021-05-11 2:42 ` [PATCH v6 14/16] KVM: x86/pmu: Add kvm_pmu_cap to optimize perf_get_x86_pmu_capability Like Xu
2021-05-11 2:42 ` [PATCH v6 15/16] KVM: x86/cpuid: Refactor host/guest CPU model consistency check Like Xu
2021-05-11 2:42 ` [PATCH v6 16/16] KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64 Like Xu
2021-05-15 10:30 ` [PATCH v6 00/16] KVM: x86/pmu: Add *basic* support to enable guest PEBS via DS Liuxiangdong
2021-05-17 6:38 ` Like Xu
2021-05-18 12:23 ` Liuxiangdong
2021-05-18 12:40 ` Xu, Like
2021-05-18 13:15 ` Liuxiangdong
2021-05-19 1:44 ` Liuxiangdong
2021-05-21 1:37 ` Like Xu
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