From: Deepak Gupta <debug@rivosinc.com>
To: paul.walmsley@sifive.com, rick.p.edgecombe@intel.com,
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Subject: [PATCH v3 14/29] riscv/mm: Implement map_shadow_stack() syscall
Date: Wed, 3 Apr 2024 16:35:02 -0700 [thread overview]
Message-ID: <20240403234054.2020347-15-debug@rivosinc.com> (raw)
In-Reply-To: <20240403234054.2020347-1-debug@rivosinc.com>
As discussed extensively in the changelog for the addition of this
syscall on x86 ("x86/shstk: Introduce map_shadow_stack syscall") the
existing mmap() and madvise() syscalls do not map entirely well onto the
security requirements for shadow stack memory since they lead to windows
where memory is allocated but not yet protected or stacks which are not
properly and safely initialised. Instead a new syscall map_shadow_stack()
has been defined which allocates and initialises a shadow stack page.
This patch implements this syscall for riscv. riscv doesn't require token
to be setup by kernel because user mode can do that by itself. However to
provide compatibility and portability with other architectues, user mode
can specify token set flag.
Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
arch/riscv/kernel/Makefile | 2 +
arch/riscv/kernel/usercfi.c | 149 ++++++++++++++++++++++++++++++++
include/uapi/asm-generic/mman.h | 1 +
3 files changed, 152 insertions(+)
create mode 100644 arch/riscv/kernel/usercfi.c
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 604d6bf7e476..3bec82f4e94c 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -107,3 +107,5 @@ obj-$(CONFIG_COMPAT) += compat_vdso/
obj-$(CONFIG_64BIT) += pi/
obj-$(CONFIG_ACPI) += acpi.o
+
+obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o
diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c
new file mode 100644
index 000000000000..c4ed0d4e33d6
--- /dev/null
+++ b/arch/riscv/kernel/usercfi.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Rivos, Inc.
+ * Deepak Gupta <debug@rivosinc.com>
+ */
+
+#include <linux/sched.h>
+#include <linux/bitops.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/uaccess.h>
+#include <linux/sizes.h>
+#include <linux/user.h>
+#include <linux/syscalls.h>
+#include <linux/prctl.h>
+#include <asm/csr.h>
+#include <asm/usercfi.h>
+
+#define SHSTK_ENTRY_SIZE sizeof(void *)
+
+/*
+ * Writes on shadow stack can either be `sspush` or `ssamoswap`. `sspush` can happen
+ * implicitly on current shadow stack pointed to by CSR_SSP. `ssamoswap` takes pointer to
+ * shadow stack. To keep it simple, we plan to use `ssamoswap` to perform writes on shadow
+ * stack.
+ */
+static noinline unsigned long amo_user_shstk(unsigned long *addr, unsigned long val)
+{
+ /*
+ * Since shadow stack is supported only in 64bit configuration,
+ * ssamoswap.d is used below. CONFIG_RISCV_USER_CFI is dependent
+ * on 64BIT and compile of this file is dependent on CONFIG_RISCV_USER_CFI
+ * In case ssamoswap faults, return -1.
+ * Never expect -1 on shadow stack. Expect return addresses and zero
+ */
+ unsigned long swap = -1;
+
+ __enable_user_access();
+ asm goto(
+ ".option push\n"
+ ".option arch, +zicfiss\n"
+ "1: ssamoswap.d %[swap], %[val], %[addr]\n"
+ _ASM_EXTABLE(1b, %l[fault])
+ RISCV_ACQUIRE_BARRIER
+ ".option pop\n"
+ : [swap] "=r" (swap), [addr] "+A" (*addr)
+ : [val] "r" (val)
+ : "memory"
+ : fault
+ );
+ __disable_user_access();
+ return swap;
+fault:
+ __disable_user_access();
+ return -1;
+}
+
+/*
+ * Create a restore token on the shadow stack. A token is always XLEN wide
+ * and aligned to XLEN.
+ */
+static int create_rstor_token(unsigned long ssp, unsigned long *token_addr)
+{
+ unsigned long addr;
+
+ /* Token must be aligned */
+ if (!IS_ALIGNED(ssp, SHSTK_ENTRY_SIZE))
+ return -EINVAL;
+
+ /* On RISC-V we're constructing token to be function of address itself */
+ addr = ssp - SHSTK_ENTRY_SIZE;
+
+ if (amo_user_shstk((unsigned long __user *)addr, (unsigned long) ssp) == -1)
+ return -EFAULT;
+
+ if (token_addr)
+ *token_addr = addr;
+
+ return 0;
+}
+
+static unsigned long allocate_shadow_stack(unsigned long addr, unsigned long size,
+ unsigned long token_offset,
+ bool set_tok)
+{
+ int flags = MAP_ANONYMOUS | MAP_PRIVATE;
+ struct mm_struct *mm = current->mm;
+ unsigned long populate, tok_loc = 0;
+
+ if (addr)
+ flags |= MAP_FIXED_NOREPLACE;
+
+ mmap_write_lock(mm);
+ addr = do_mmap(NULL, addr, size, PROT_READ, flags,
+ VM_SHADOW_STACK | VM_WRITE, 0, &populate, NULL);
+ mmap_write_unlock(mm);
+
+ if (!set_tok || IS_ERR_VALUE(addr))
+ goto out;
+
+ if (create_rstor_token(addr + token_offset, &tok_loc)) {
+ vm_munmap(addr, size);
+ return -EINVAL;
+ }
+
+ addr = tok_loc;
+
+out:
+ return addr;
+}
+
+SYSCALL_DEFINE3(map_shadow_stack, unsigned long, addr, unsigned long, size, unsigned int, flags)
+{
+ bool set_tok = flags & SHADOW_STACK_SET_TOKEN;
+ unsigned long aligned_size = 0;
+
+ if (!cpu_supports_shadow_stack())
+ return -EOPNOTSUPP;
+
+ /* Anything other than set token should result in invalid param */
+ if (flags & ~SHADOW_STACK_SET_TOKEN)
+ return -EINVAL;
+
+ /*
+ * Unlike other architectures, on RISC-V, SSP pointer is held in CSR_SSP and is available
+ * CSR in all modes. CSR accesses are performed using 12bit index programmed in instruction
+ * itself. This provides static property on register programming and writes to CSR can't
+ * be unintentional from programmer's perspective. As long as programmer has guarded areas
+ * which perform writes to CSR_SSP properly, shadow stack pivoting is not possible. Since
+ * CSR_SSP is writeable by user mode, it itself can setup a shadow stack token subsequent
+ * to allocation. Although in order to provide portablity with other architecture (because
+ * `map_shadow_stack` is arch agnostic syscall), RISC-V will follow expectation of a token
+ * flag in flags and if provided in flags, setup a token at the base.
+ */
+
+ /* If there isn't space for a token */
+ if (set_tok && size < SHSTK_ENTRY_SIZE)
+ return -ENOSPC;
+
+ if (addr && (addr % PAGE_SIZE))
+ return -EINVAL;
+
+ aligned_size = PAGE_ALIGN(size);
+ if (aligned_size < size)
+ return -EOVERFLOW;
+
+ return allocate_shadow_stack(addr, aligned_size, size, set_tok);
+}
diff --git a/include/uapi/asm-generic/mman.h b/include/uapi/asm-generic/mman.h
index 57e8195d0b53..0c0ac6214de6 100644
--- a/include/uapi/asm-generic/mman.h
+++ b/include/uapi/asm-generic/mman.h
@@ -19,4 +19,5 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
+#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */
#endif /* __ASM_GENERIC_MMAN_H */
--
2.43.2
next prev parent reply other threads:[~2024-04-03 23:42 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 23:34 [PATCH v3 00/29] riscv control-flow integrity for usermode Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 01/29] riscv: envcfg save and restore on task switching Deepak Gupta
2024-05-09 0:10 ` Charlie Jenkins
2024-05-09 19:00 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 02/29] riscv: define default value for envcfg for task Deepak Gupta
2024-05-10 22:33 ` Charlie Jenkins
2024-05-13 18:33 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 03/29] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv Deepak Gupta
2024-05-10 22:36 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 04/29] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2024-04-10 11:58 ` Rob Herring
2024-04-10 21:37 ` Deepak Gupta
2024-04-15 19:41 ` Rob Herring
2024-04-16 15:44 ` Deepak Gupta
2024-05-09 18:14 ` Conor Dooley
2024-05-09 18:46 ` Deepak Gupta
2024-05-09 20:32 ` Conor Dooley
2024-05-09 23:26 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 05/29] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2024-05-09 0:00 ` Andy Chiu
2024-05-09 0:07 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 06/29] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2024-05-10 22:37 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 07/29] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-05-10 22:51 ` Charlie Jenkins
2024-04-03 23:34 ` [PATCH v3 08/29] mm: Define VM_SHADOW_STACK for RISC-V Deepak Gupta
2024-04-04 18:58 ` David Hildenbrand
2024-04-04 19:04 ` Mark Brown
2024-04-04 19:15 ` David Hildenbrand
2024-04-04 19:21 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 09/29] mm: abstract shadow stack vma behind `vma_is_shadow_stack` Deepak Gupta
2024-04-04 19:02 ` David Hildenbrand
2024-04-04 21:39 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 10/29] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-05-10 21:02 ` Charlie Jenkins
2024-05-13 17:47 ` Deepak Gupta
2024-05-13 18:36 ` Charlie Jenkins
2024-05-13 18:41 ` Deepak Gupta
2024-05-13 21:26 ` Charlie Jenkins
2024-05-12 16:24 ` Alexandre Ghiti
2024-05-13 18:29 ` Deepak Gupta
2024-04-03 23:34 ` [PATCH v3 11/29] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-05-12 16:26 ` Alexandre Ghiti
2024-04-03 23:35 ` [PATCH v3 12/29] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-05-12 16:28 ` Alexandre Ghiti
2024-05-13 17:33 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 13/29] riscv mmu: write protect and shadow stack Deepak Gupta
2024-05-12 16:31 ` Alexandre Ghiti
2024-05-13 17:32 ` Deepak Gupta
2024-05-23 14:59 ` Alexandre Ghiti
2024-05-24 7:16 ` Deepak Gupta
2024-04-03 23:35 ` Deepak Gupta [this message]
2024-05-12 16:50 ` [PATCH v3 14/29] riscv/mm: Implement map_shadow_stack() syscall Alexandre Ghiti
2024-05-13 17:25 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 15/29] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-05-12 17:05 ` Alexandre Ghiti
2024-05-13 17:10 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 16/29] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 17/29] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2024-05-10 23:29 ` Charlie Jenkins
2024-05-13 18:31 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 18/29] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 19/29] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 20/29] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-05-12 17:10 ` Alexandre Ghiti
2024-04-03 23:35 ` [PATCH v3 21/29] riscv/traps: Introduce software check exception Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 22/29] riscv sigcontext: adding cfi state field in sigcontext Deepak Gupta
2024-05-24 9:46 ` Andy Chiu
2024-05-24 19:11 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 23/29] riscv signal: Save and restore of shadow stack for signal Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 24/29] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 25/29] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 26/29] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 27/29] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-05-10 20:30 ` Charlie Jenkins
2024-05-13 17:07 ` Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 28/29] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-04-03 23:35 ` [PATCH v3 29/29] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-05-09 18:21 ` Charlie Jenkins
2024-05-09 19:16 ` Deepak Gupta
2024-05-10 1:20 ` Charlie Jenkins
2024-05-09 0:33 ` [PATCH v3 00/29] riscv control-flow integrity for usermode Charlie Jenkins
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