From: Vinod Koul <vkoul@kernel.org>
To: Thomas Richard <thomas.richard@bootlin.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
"Bartosz Golaszewski" <brgl@bgdev.pl>,
"Andy Shevchenko" <andy@kernel.org>,
"Tony Lindgren" <tony@atomide.com>,
"Haojian Zhuang" <haojian.zhuang@linaro.org>,
"Vignesh R" <vigneshr@ti.com>,
"Aaro Koskinen" <aaro.koskinen@iki.fi>,
"Janusz Krzysztofik" <jmkrzyszt@gmail.com>,
"Andi Shyti" <andi.shyti@kernel.org>,
"Peter Rosin" <peda@axentia.se>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org,
linux-i2c@vger.kernel.org, linux-phy@lists.infradead.org,
linux-pci@vger.kernel.org, gregory.clement@bootlin.com,
theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com,
u-kumar1@ti.com
Subject: Re: [PATCH v4 07/18] phy: ti: phy-j721e-wiz: split wiz_clock_init() function
Date: Fri, 5 Apr 2024 22:12:54 +0530 [thread overview]
Message-ID: <ZhAqDmQO9TYeDPz6@matsya> (raw)
In-Reply-To: <20240102-j7200-pcie-s2r-v4-7-6f1f53390c85@bootlin.com>
On 04-03-24, 16:35, Thomas Richard wrote:
> The wiz_clock_init() function mixes probe and hardware configuration.
> Rename the wiz_clock_init() to wiz_clock_probe() and move the hardware
> configuration part in a new function named wiz_clock_init().
>
> This hardware configuration sequence must be called during the resume
> stage of the driver.
Do you have phy patches dependent on rest, if not consider submitting
them in a separate series
>
> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
> ---
> drivers/phy/ti/phy-j721e-wiz.c | 67 ++++++++++++++++++++++++------------------
> 1 file changed, 38 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
> index 5fea4df9404e..0e3cb1ed5a52 100644
> --- a/drivers/phy/ti/phy-j721e-wiz.c
> +++ b/drivers/phy/ti/phy-j721e-wiz.c
> @@ -1076,26 +1076,12 @@ static int wiz_clock_register(struct wiz *wiz)
> return ret;
> }
>
> -static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
> +static void wiz_clock_init(struct wiz *wiz)
> {
> - const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
> - struct device *dev = wiz->dev;
> - struct device_node *clk_node;
> - const char *node_name;
> unsigned long rate;
> - struct clk *clk;
> - int ret;
> - int i;
> -
> - clk = devm_clk_get(dev, "core_ref_clk");
> - if (IS_ERR(clk))
> - return dev_err_probe(dev, PTR_ERR(clk),
> - "core_ref_clk clock not found\n");
>
> - wiz->input_clks[WIZ_CORE_REFCLK] = clk;
> -
> - rate = clk_get_rate(clk);
> - if (rate >= 100000000)
> + rate = clk_get_rate(wiz->input_clks[WIZ_CORE_REFCLK]);
> + if (rate >= REF_CLK_100MHZ)
> regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x1);
> else
> regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x3);
> @@ -1119,6 +1105,39 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
> break;
> }
>
> + if (wiz->input_clks[WIZ_CORE_REFCLK1]) {
> + rate = clk_get_rate(wiz->input_clks[WIZ_CORE_REFCLK1]);
> + if (rate >= REF_CLK_100MHZ)
> + regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x1);
> + else
> + regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x3);
> +
unnecessary empty line
> + }
> +
> + rate = clk_get_rate(wiz->input_clks[WIZ_EXT_REFCLK]);
> + if (rate >= REF_CLK_100MHZ)
> + regmap_field_write(wiz->pma_cmn_refclk_mode, 0x0);
> + else
> + regmap_field_write(wiz->pma_cmn_refclk_mode, 0x2);
> +}
> +
> +static int wiz_clock_probe(struct wiz *wiz, struct device_node *node)
> +{
> + const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
> + struct device *dev = wiz->dev;
> + struct device_node *clk_node;
> + const char *node_name;
> + struct clk *clk;
> + int ret;
> + int i;
> +
> + clk = devm_clk_get(dev, "core_ref_clk");
> + if (IS_ERR(clk))
> + return dev_err_probe(dev, PTR_ERR(clk),
> + "core_ref_clk clock not found\n");
> +
> + wiz->input_clks[WIZ_CORE_REFCLK] = clk;
> +
> if (wiz->data->pma_cmn_refclk1_int_mode) {
> clk = devm_clk_get(dev, "core_ref1_clk");
> if (IS_ERR(clk))
> @@ -1126,12 +1145,6 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
> "core_ref1_clk clock not found\n");
>
> wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
> -
> - rate = clk_get_rate(clk);
> - if (rate >= 100000000)
> - regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x1);
> - else
> - regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x3);
> }
>
> clk = devm_clk_get(dev, "ext_ref_clk");
> @@ -1141,11 +1154,7 @@ static int wiz_clock_init(struct wiz *wiz, struct device_node *node)
>
> wiz->input_clks[WIZ_EXT_REFCLK] = clk;
>
> - rate = clk_get_rate(clk);
> - if (rate >= 100000000)
> - regmap_field_write(wiz->pma_cmn_refclk_mode, 0x0);
> - else
> - regmap_field_write(wiz->pma_cmn_refclk_mode, 0x2);
> + wiz_clock_init(wiz);
>
> switch (wiz->type) {
> case AM64_WIZ_10G:
> @@ -1589,7 +1598,7 @@ static int wiz_probe(struct platform_device *pdev)
> goto err_get_sync;
> }
>
> - ret = wiz_clock_init(wiz, node);
> + ret = wiz_clock_probe(wiz, node);
> if (ret < 0) {
> dev_warn(dev, "Failed to initialize clocks\n");
> goto err_get_sync;
>
> --
> 2.39.2
--
~Vinod
next prev parent reply other threads:[~2024-04-05 16:42 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-04 15:35 [PATCH v4 00/18] Add suspend to ram support for PCIe on J7200 Thomas Richard
2024-03-04 15:35 ` [PATCH v4 01/18] gpio: pca953x: move suspend()/resume() to suspend_noirq()/resume_noirq() Thomas Richard
2024-03-04 15:35 ` [PATCH v4 02/18] pinctrl: pinctrl-single: move suspend()/resume() callbacks to noirq Thomas Richard
2024-03-08 8:39 ` Tony Lindgren
2024-03-20 7:44 ` Dhruva Gole
2024-03-20 8:37 ` Thomas Richard
2024-03-28 21:07 ` Linus Walleij
2024-03-04 15:35 ` [PATCH v4 03/18] i2c: omap: wakeup the controller during suspend() callback Thomas Richard
2024-03-08 8:42 ` Tony Lindgren
2024-03-12 8:03 ` Wolfram Sang
2024-03-13 0:48 ` Andi Shyti
2024-03-13 6:21 ` Wolfram Sang
2024-03-13 0:37 ` Andi Shyti
2024-03-04 15:35 ` [PATCH v4 04/18] mux: add mux_chip_resume() function Thomas Richard
2024-03-04 15:35 ` [PATCH v4 05/18] mux: mmio: add resume support Thomas Richard
2024-03-04 15:35 ` [PATCH v4 06/18] phy: ti: phy-j721e-wiz: use dev_err_probe() instead of dev_err() Thomas Richard
2024-03-04 15:35 ` [PATCH v4 07/18] phy: ti: phy-j721e-wiz: split wiz_clock_init() function Thomas Richard
2024-04-05 16:42 ` Vinod Koul [this message]
2024-03-04 15:35 ` [PATCH v4 08/18] phy: ti: phy-j721e-wiz: add resume support Thomas Richard
2024-04-05 16:44 ` Vinod Koul
2024-04-05 17:14 ` Andy Shevchenko
2024-03-04 15:35 ` [PATCH v4 09/18] phy: cadence-torrent: extract calls to clk_get from cdns_torrent_clk Thomas Richard
2024-03-04 15:35 ` [PATCH v4 10/18] phy: cadence-torrent: register resets even if the phy is already configured Thomas Richard
2024-03-04 15:35 ` [PATCH v4 11/18] phy: cadence-torrent: add already_configured to struct cdns_torrent_phy Thomas Richard
2024-03-04 15:35 ` [PATCH v4 12/18] phy: cadence-torrent: remove noop_ops phy operations Thomas Richard
2024-03-04 15:35 ` [PATCH v4 13/18] phy: cadence-torrent: add suspend and resume support Thomas Richard
2024-03-04 15:35 ` [PATCH v4 14/18] PCI: cadence: Extract link setup sequence from cdns_pcie_host_setup() Thomas Richard
2024-03-04 15:35 ` [PATCH v4 15/18] PCI: cadence: Set cdns_pcie_host_init() global Thomas Richard
2024-03-04 15:35 ` [PATCH v4 16/18] PCI: j721e: Use dev_err_probe() in the probe() function Thomas Richard
2024-04-10 7:51 ` Francesco Dolcini
2024-03-04 15:36 ` [PATCH v4 17/18] PCI: j721e: Add reset GPIO to struct j721e_pcie Thomas Richard
2024-03-04 15:36 ` [PATCH v4 18/18] PCI: j721e: Add suspend and resume support Thomas Richard
2024-03-13 6:51 ` Siddharth Vadapalli
2024-03-28 22:07 ` Bjorn Helgaas
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