From: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
To: Prashanth K <quic_prashk@quicinc.com>
Cc: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Wesley Cheng <quic_wcheng@quicinc.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH v2] usb: dwc3: Wait unconditionally after issuing EndXfer command
Date: Thu, 25 Apr 2024 23:22:08 +0000 [thread overview]
Message-ID: <20240425232200.kozymtwjxjs7nmoz@synopsys.com> (raw)
In-Reply-To: <20240425045749.1493541-1-quic_prashk@quicinc.com>
On Thu, Apr 25, 2024, Prashanth K wrote:
> Currently all controller IP/revisions except DWC3_usb3 >= 310a
> wait 1ms unconditionally for ENDXFER completion when IOC is not
> set. This is because DWC_usb3 controller revisions >= 3.10a
> supports GUCTL2[14: Rst_actbitlater] bit which allows polling
> CMDACT bit to know whether ENDXFER command is completed.
>
> Consider a case where an IN request was queued, and parallelly
> soft_disconnect was called (due to ffs_epfile_release). This
> eventually calls stop_active_transfer with IOC cleared, hence
> send_gadget_ep_cmd() skips waiting for CMDACT cleared during
> EndXfer. For DWC3 controllers with revisions >= 310a, we don't
> forcefully wait for 1ms either, and we proceed by unmapping the
> requests. If ENDXFER didn't complete by this time, it leads to
> SMMU faults since the controller would still be accessing those
> requests.
>
> Fix this by ensuring ENDXFER completion by adding 1ms delay in
> __dwc3_stop_active_transfer() unconditionally.
>
> Cc: <stable@vger.kernel.org>
> Fixes: b353eb6dc285 ("usb: dwc3: gadget: Skip waiting for CMDACT cleared during endxfer")
> Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
> ---
> Changes in v2:
> Changed the patch logic from CMDACT polling to 1ms mdelay.
> Updated subject and commit accordingly.
> Link to v1: https://urldefense.com/v3/__https://lore.kernel.org/all/20240422090539.3986723-1-quic_prashk@quicinc.com/__;!!A4F2R9G_pg!fa3zoJhmfdChG32lHtAa-7bxJpxPsw2wgzQwQAq9gWG2LwWyr9WnIzm9Eol6hmiKLEOTJuqjOeTYVYZ_sNnER6p_uF4$
>
> drivers/usb/dwc3/gadget.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> index 4df2661f6675..666eae94524f 100644
> --- a/drivers/usb/dwc3/gadget.c
> +++ b/drivers/usb/dwc3/gadget.c
> @@ -1724,8 +1724,7 @@ static int __dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, bool int
> dep->resource_index = 0;
>
> if (!interrupt) {
> - if (!DWC3_IP_IS(DWC3) || DWC3_VER_IS_PRIOR(DWC3, 310A))
> - mdelay(1);
> + mdelay(1);
> dep->flags &= ~DWC3_EP_TRANSFER_STARTED;
> } else if (!ret) {
> dep->flags |= DWC3_EP_END_TRANSFER_PENDING;
> --
> 2.25.1
>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Thanks,
Thinh
next prev parent reply other threads:[~2024-04-25 23:22 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-25 4:57 [PATCH v2] usb: dwc3: Wait unconditionally after issuing EndXfer command Prashanth K
2024-04-25 23:22 ` Thinh Nguyen [this message]
2024-04-30 16:06 ` Greg Kroah-Hartman
2024-04-30 22:59 ` Thinh Nguyen
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