From: Claudiu <claudiu.beznea@tuxon.dev>
To: wim@linux-watchdog.org, linux@roeck-us.net, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm@gmail.com,
mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de, biju.das.jz@bp.renesas.com
Cc: linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org, claudiu.beznea@tuxon.dev,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: [PATCH v2 01/11] clk: renesas: r9a08g045: Add clock and reset support for watchdog
Date: Wed, 31 Jan 2024 12:20:07 +0200 [thread overview]
Message-ID: <20240131102017.1841495-2-claudiu.beznea.uj@bp.renesas.com> (raw)
In-Reply-To: <20240131102017.1841495-1-claudiu.beznea.uj@bp.renesas.com>
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
RZ/G3S has a watchdog module accessible by the Cortex-A core. Add clock
and reset support for it.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
Changes in v2:
- collected tags
drivers/clk/renesas/r9a08g045-cpg.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c
index 2582ba95256e..c3e6da2de197 100644
--- a/drivers/clk/renesas/r9a08g045-cpg.c
+++ b/drivers/clk/renesas/r9a08g045-cpg.c
@@ -193,6 +193,8 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = {
DEF_MOD("ia55_pclk", R9A08G045_IA55_PCLK, R9A08G045_CLK_P2, 0x518, 0),
DEF_MOD("ia55_clk", R9A08G045_IA55_CLK, R9A08G045_CLK_P1, 0x518, 1),
DEF_MOD("dmac_aclk", R9A08G045_DMAC_ACLK, R9A08G045_CLK_P3, 0x52c, 0),
+ DEF_MOD("wdt0_pclk", R9A08G045_WDT0_PCLK, R9A08G045_CLK_P0, 0x548, 0),
+ DEF_MOD("wdt0_clk", R9A08G045_WDT0_CLK, R9A08G045_OSCCLK, 0x548, 1),
DEF_MOD("sdhi0_imclk", R9A08G045_SDHI0_IMCLK, CLK_SD0_DIV4, 0x554, 0),
DEF_MOD("sdhi0_imclk2", R9A08G045_SDHI0_IMCLK2, CLK_SD0_DIV4, 0x554, 1),
DEF_MOD("sdhi0_clk_hs", R9A08G045_SDHI0_CLK_HS, R9A08G045_CLK_SD0, 0x554, 2),
@@ -219,6 +221,7 @@ static const struct rzg2l_reset r9a08g045_resets[] = {
DEF_RST(R9A08G045_GIC600_GICRESET_N, 0x814, 0),
DEF_RST(R9A08G045_GIC600_DBG_GICRESET_N, 0x814, 1),
DEF_RST(R9A08G045_IA55_RESETN, 0x818, 0),
+ DEF_RST(R9A08G045_WDT0_PRESETN, 0x848, 0),
DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0),
DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1),
DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2),
--
2.39.2
next prev parent reply other threads:[~2024-01-31 10:20 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-31 10:20 [PATCH v2 00/11] watchdog: rzg2l_wdt: Add support for RZ/G3S Claudiu
2024-01-31 10:20 ` Claudiu [this message]
2024-01-31 10:20 ` [PATCH v2 02/11] watchdog: rzg2l_wdt: Select PM Claudiu
2024-02-01 8:52 ` Geert Uytterhoeven
2024-02-01 13:36 ` Guenter Roeck
2024-02-01 21:05 ` kernel test robot
2024-01-31 10:20 ` [PATCH v2 03/11] watchdog: rzg2l_wdt: Use pm_runtime_resume_and_get() Claudiu
2024-01-31 10:20 ` [PATCH v2 04/11] watchdog: rzg2l_wdt: Check return status of pm_runtime_put() Claudiu
2024-01-31 10:32 ` Biju Das
2024-01-31 10:35 ` claudiu beznea
2024-01-31 10:41 ` Biju Das
2024-01-31 11:00 ` claudiu beznea
2024-01-31 13:16 ` Guenter Roeck
2024-02-01 6:11 ` claudiu beznea
2024-01-31 13:14 ` Guenter Roeck
2024-01-31 13:38 ` Biju Das
2024-01-31 10:20 ` [PATCH v2 05/11] watchdog: rzg2l_wdt: Remove reset de-assert on probe/stop Claudiu
2024-01-31 10:20 ` [PATCH v2 06/11] watchdog: rzg2l_wdt: Remove comparison with zero Claudiu
2024-01-31 10:20 ` [PATCH v2 07/11] watchdog: rzg2l_wdt: Rely on the reset driver for doing proper reset Claudiu
2024-01-31 10:20 ` [PATCH v2 08/11] watchdog: rzg2l_wdt: Add suspend/resume support Claudiu
2024-01-31 10:20 ` [PATCH v2 09/11] dt-bindings: watchdog: renesas,wdt: Document RZ/G3S support Claudiu
2024-01-31 10:20 ` [PATCH v2 10/11] arm64: dts: renesas: r9a08g045: Add watchdog node Claudiu
2024-01-31 10:20 ` [PATCH v2 11/11] arm64: dts: renesas: rzg3s-smarc-som: Enable the watchdog interface Claudiu
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