LKML Archive mirror
 help / color / mirror / Atom feed
From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>,
	linux-sunxi@googlegroups.com
Cc: "Arnd Bergmann" <arnd@arndb.de>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	"Emilio López" <emilio@elopez.com.ar>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@codeaurora.org>,
	linux-clk@vger.kernel.org, "Jens Kuske" <jenskuske@gmail.com>
Subject: [PATCH 06/11] clk: sunxi: add generic multi-parent bus clock gates driver
Date: Mon,  1 Feb 2016 17:39:25 +0000	[thread overview]
Message-ID: <1454348370-3816-7-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1454348370-3816-1-git-send-email-andre.przywara@arm.com>

The Allwinner H3 SoC introduced bus clock gates with potentially
different parents per clock gate. The H3 driver chose to hardcode the
actual parent clock relation in the code.
Add a new driver (which has the potential to drive the H3 and also
the simple clock gates as well) which uses the power of DT to describe
this relationship in an elegant and flexible way.
Using one subnode for every parent clock we get away with a single
DT compatible match, which can be used as a fallback value in the
actual DTs without the need to add specific compatible strings to the
code.  This avoids adding a new driver or function for every new SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Changelog RFC .. v1:
- fix IRQ muxes to cover the three banks of the SoC
- amend naming of PCM pins

 drivers/clk/sunxi/Makefile          |   1 +
 drivers/clk/sunxi/clk-multi-gates.c | 105 ++++++++++++++++++++++++++++++++++++
 2 files changed, 106 insertions(+)
 create mode 100644 drivers/clk/sunxi/clk-multi-gates.c

diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 3fd7901..3a9dc31 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o
 obj-y += clk-a20-gmac.o
 obj-y += clk-mod0.o
 obj-y += clk-simple-gates.o
+obj-y += clk-multi-gates.o
 obj-y += clk-sun8i-bus-gates.o
 obj-y += clk-sun8i-mbus.o
 obj-y += clk-sun9i-core.o
diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c
new file mode 100644
index 0000000..76e715a
--- /dev/null
+++ b/drivers/clk/sunxi/clk-multi-gates.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * Based on clk-sun8i-bus-gates.c, which is:
+ *  Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
+ * Based on clk-simple-gates.c, which is:
+ *  Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+static DEFINE_SPINLOCK(gates_lock);
+
+static void __init sunxi_parse_parent(struct device_node *node,
+				      struct clk_onecell_data *clk_data,
+				      void __iomem *reg)
+{
+	const char *parent = of_clk_get_parent_name(node, 0);
+	const char *clk_name;
+	struct property *prop;
+	struct clk *clk;
+	const __be32 *p;
+	int index, i = 0;
+
+	of_property_for_each_u32(node, "clock-indices", prop, p, index) {
+		of_property_read_string_index(node, "clock-output-names",
+					      i, &clk_name);
+
+		clk = clk_register_gate(NULL, clk_name, parent, 0,
+					reg + 4 * (index / 32), index % 32,
+					0, &gates_lock);
+		i++;
+		if (IS_ERR(clk)) {
+			pr_warn("could not register gate clock \"%s\"\n",
+				clk_name);
+			continue;
+		}
+		if (clk_data->clks[index])
+			pr_warn("bus-gate clock %s: index #%d already registered as %s\n",
+				clk_name, index, "?");
+		else
+			clk_data->clks[index] = clk;
+	}
+}
+
+static void __init sunxi_multi_bus_gates_init(struct device_node *node)
+{
+	struct clk_onecell_data *clk_data;
+	struct device_node *child;
+	struct property *prop;
+	struct resource res;
+	void __iomem *reg;
+	const __be32 *p;
+	int number = 0;
+	int index;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (IS_ERR(reg))
+		return;
+
+	clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
+	if (!clk_data)
+		goto err_unmap;
+
+	for_each_child_of_node(node, child)
+		of_property_for_each_u32(child, "clock-indices", prop, p, index)
+			number = max(number, index);
+
+	clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
+	if (!clk_data->clks)
+		goto err_free_data;
+
+	for_each_child_of_node(node, child)
+		sunxi_parse_parent(child, clk_data, reg);
+
+	clk_data->clk_num = number + 1;
+	if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data))
+		pr_err("registering bus-gate clock %s failed\n", node->name);
+
+	return;
+
+err_free_data:
+	kfree(clk_data);
+err_unmap:
+	iounmap(reg);
+	of_address_to_resource(node, 0, &res);
+	release_mem_region(res.start, resource_size(&res));
+}
+
+CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk",
+	       sunxi_multi_bus_gates_init);
-- 
2.6.4

  parent reply	other threads:[~2016-02-01 17:40 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-01 17:39 [PATCH 00/11] arm64: Introduce Allwinner A64 and Pine64 support Andre Przywara
2016-02-01 17:39 ` [PATCH 01/11] irqchip: sun4i: fix compilation outside of arch/arm Andre Przywara
2016-02-02 14:51   ` [tip:irq/urgent] irqchip/sun4i: Fix compilation outside of arch/ arm tip-bot for Andre Przywara
2016-02-02 15:12   ` [PATCH 01/11] irqchip: sun4i: fix compilation outside of arch/arm Matthias Brugger
2016-02-02 15:32     ` Andre Przywara
2016-02-02 16:50       ` Matthias Brugger
2016-02-01 17:39 ` [PATCH 02/11] crypto: sunxi-ss: prevent compilation on 64-bit Andre Przywara
2016-02-02  3:16   ` Herbert Xu
2016-02-02  8:42   ` [linux-sunxi] " LABBE Corentin
2016-02-06  7:46   ` Herbert Xu
2016-02-01 17:39 ` [PATCH 03/11] drivers: rtc: allow compilation of sun6i RTC for all sunxi SoCs Andre Przywara
2016-02-02  9:44   ` Maxime Ripard
2016-02-04 22:58   ` Alexandre Belloni
2016-02-01 17:39 ` [PATCH 04/11] arm64: Introduce Allwinner SoC config option Andre Przywara
2016-02-02 15:20   ` Matthias Brugger
2016-02-02 15:30     ` Andre Przywara
2016-02-02 16:04       ` Arnd Bergmann
2016-02-01 17:39 ` [PATCH 05/11] drivers: pinctrl: add driver for Allwinner A64 SoC Andre Przywara
2016-02-01 18:27   ` Karsten Merker
2016-02-01 18:45     ` [linux-sunxi] " Karsten Merker
2016-02-01 23:02       ` André Przywara
2016-02-01 22:49     ` André Przywara
2016-02-02  1:58       ` [linux-sunxi] " Siarhei Siamashka
2016-02-02 14:24         ` Andre Przywara
2016-02-02 17:37         ` Maxime Ripard
2016-02-02 10:00       ` Maxime Ripard
2016-02-02 10:09         ` Chen-Yu Tsai
2016-02-02 16:53         ` Andre Przywara
2016-02-04 16:51           ` Maxime Ripard
2016-02-08 15:54             ` Rob Herring
2016-02-08 15:58               ` Andre Przywara
2016-02-09 17:12                 ` Maxime Ripard
2016-02-01 17:39 ` Andre Przywara [this message]
2016-02-01 18:40   ` [PATCH 06/11] clk: sunxi: add generic multi-parent bus clock gates driver Jean-Francois Moine
2016-02-01 23:01     ` André Przywara
2016-02-01 17:39 ` [PATCH 07/11] clk: sunxi: add generic allwinner,sunxi name Andre Przywara
2016-02-08 15:57   ` Rob Herring
2016-02-08 16:06     ` Andre Przywara
2016-02-01 17:39 ` [PATCH 08/11] clk: sunxi: improve error reporting for the mux clock Andre Przywara
2016-02-02 18:02   ` Maxime Ripard
2016-02-02 18:05     ` Andre Przywara
2016-02-01 17:39 ` [PATCH 09/11] clk: sunxi: add critical-clocks property to mux clocks Andre Przywara
2016-02-01 17:39 ` [PATCH 10/11] arm64: dts: add Allwinner A64 SoC .dtsi Andre Przywara
2016-02-01 19:05   ` [linux-sunxi] " Karsten Merker
2016-02-01 23:03     ` André Przywara
2016-02-02 16:24   ` Jens Kuske
2016-02-02 16:46     ` Andre Przywara
2016-02-02 17:40       ` Jens Kuske
2016-02-05  8:55       ` Chen-Yu Tsai
2016-02-05  8:50   ` Maxime Ripard
2016-02-08  9:42     ` Andre Przywara
2016-02-23 18:45       ` Maxime Ripard
2016-02-01 17:39 ` [PATCH 11/11] arm64: dts: add Pine64 support Andre Przywara
2016-02-01 19:22   ` [linux-sunxi] " Karsten Merker
2016-02-01 23:04     ` André Przywara
2016-02-05  9:03   ` Maxime Ripard
2016-02-05 10:04     ` Andre Przywara
2016-02-08  0:55       ` [linux-sunxi] " Julian Calaby
2016-02-09 20:33         ` Danny Milosavljevic
2016-02-11 10:32       ` Maxime Ripard
2016-02-02  7:57 ` [PATCH 00/11] arm64: Introduce Allwinner A64 and " lists.nick.betteridge
2016-02-02  8:12   ` André Przywara

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1454348370-3816-7-git-send-email-andre.przywara@arm.com \
    --to=andre.przywara@arm.com \
    --cc=arnd@arndb.de \
    --cc=emilio@elopez.com.ar \
    --cc=jenskuske@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-sunxi@googlegroups.com \
    --cc=maxime.ripard@free-electrons.com \
    --cc=mturquette@baylibre.com \
    --cc=sboyd@codeaurora.org \
    --cc=wens@csie.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).