From: James Liao <jamesjj.liao@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh@kernel.org>
Cc: John Crispin <blogic@openwrt.org>, Arnd Bergmann <arnd@arndb.de>,
Sascha Hauer <kernel@pengutronix.de>,
Daniel Kurtz <djkurtz@chromium.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <linux-clk@vger.kernel.org>,
Shunli Wang <shunli.wang@mediatek.com>,
James Liao <jamesjj.liao@mediatek.com>
Subject: [PATCH v6 6/7] reset: mediatek: Add MT2701 reset driver
Date: Fri, 5 Feb 2016 17:37:29 +0800 [thread overview]
Message-ID: <1454665050-37776-7-git-send-email-jamesjj.liao@mediatek.com> (raw)
In-Reply-To: <1454665050-37776-1-git-send-email-jamesjj.liao@mediatek.com>
From: Shunli Wang <shunli.wang@mediatek.com>
In infrasys and perifsys, there are many reset
control bits for kinds of modules. These bits are
used as actual reset controllers to be registered
into kernel's generic reset controller framework.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/clk/mediatek/clk-mt2701.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c
index 0ac45fc..01722e0 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 2, 0x30);
}
CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 2, 0x0);
}
CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
@@ -997,6 +1001,8 @@ static void __init mtk_hifsys_init(struct device_node *node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+ mtk_register_reset_controller(node, 1, 0x34);
}
CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);
--
1.9.1
next prev parent reply other threads:[~2016-02-05 9:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-05 9:37 [PATCH v6 0/7] Add clock support for Mediatek MT2701 James Liao
2016-02-05 9:37 ` [PATCH v6 1/7] clk: mediatek: Refine the makefile to support multiple clock drivers James Liao
2016-02-05 9:37 ` [PATCH v6 2/7] dt-bindings: ARM: Mediatek: Document bindings for MT2701 James Liao
2016-02-08 19:24 ` Rob Herring
2016-02-05 9:37 ` [PATCH v6 3/7] clk: mediatek: Add dt-bindings for MT2701 clocks James Liao
2016-02-05 9:37 ` [PATCH v6 4/7] clk: mediatek: Add MT2701 clock support James Liao
2016-02-10 20:08 ` Michael Turquette
2016-02-15 9:19 ` James Liao
[not found] ` <20160224212533.2278.7597@quark.deferred.io>
2016-02-25 6:24 ` James Liao
2016-03-21 8:45 ` James Liao
2016-02-05 9:37 ` [PATCH v6 5/7] reset: mediatek: Add MT2701 reset controller dt-binding file James Liao
2016-02-05 9:37 ` James Liao [this message]
2016-02-05 9:37 ` [PATCH v6 7/7] clk: mediatek: Enable critical clocks for MT2701 James Liao
2016-02-11 21:35 ` Michael Turquette
2016-02-15 9:50 ` James Liao
2016-02-24 2:26 ` James Liao
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