From: David Lechner <david@lechnology.com>
To: Judith Mendez <jm@ti.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
William Breathitt Gray <william.gray@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org
Subject: Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding
Date: Mon, 22 Apr 2024 13:25:52 -0500 [thread overview]
Message-ID: <4cf5f463-dccd-4637-b7ce-e8d8eac044b7@lechnology.com> (raw)
In-Reply-To: <20240418221417.1592787-6-jm@ti.com>
On 4/18/24 5:14 PM, Judith Mendez wrote:
> Update eQEP binding for TI K3 devices.
It would make more sense to have this patch first in the series
before the dts changes.
>
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
> Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> index 85f1ff83afe72..11755074c8a91 100644
> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> @@ -14,19 +14,23 @@ properties:
> const: ti,am3352-eqep
>
As Krzysztof hinted, it sounds like we need to add new compatibles
here and have some -if: statements to account for the differences
in SoCs rather than making the bindings less strict.
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
>
> interrupts:
> description: The eQEP event interrupt
> maxItems: 1
>
> clocks:
> - description: The clock that determines the SYSCLKOUT rate for the eQEP
> + description: The clock that determines the clock rate for the eQEP
> peripheral.
> maxItems: 1
>
> clock-names:
> - const: sysclkout
> + maxItems: 1
In hindsight, this is not the best name. Since we only have one clock
we don't really need the name anyway, so for the new compatibles, we
could set clock-names: false.
> +
> + power-domains:
> + maxItems: 1
>
> required:
> - compatible
I see that the CFG0 syscon register on AM62x has some control knobs for
the EQEP so it would be good to add this to the bindings now too to try
to make the bindings as complete as possible. (I didn't look at other
chips so the same may apply to others as well.)
next prev parent reply other threads:[~2024-04-22 18:47 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-18 22:14 [PATCH 0/7] Enable eQEP DT support for Sitara K3 platforms Judith Mendez
2024-04-18 22:14 ` [PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes Judith Mendez
2024-04-19 13:56 ` Krzysztof Kozlowski
2024-04-22 22:07 ` Judith Mendez
2024-04-18 22:14 ` [PATCH 2/7] arm64: dts: ti: k3-am62a-main: " Judith Mendez
2024-04-18 22:14 ` [PATCH 3/7] arm64: dts: ti: k3-am62p-main: " Judith Mendez
2024-04-18 22:14 ` [PATCH 4/7] arm64: dts: ti: k3-am64-main: " Judith Mendez
2024-04-18 22:14 ` [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding Judith Mendez
2024-04-19 13:55 ` Krzysztof Kozlowski
2024-04-22 22:11 ` Judith Mendez
2024-04-23 9:54 ` Krzysztof Kozlowski
2024-04-22 18:25 ` David Lechner [this message]
2024-04-22 22:15 ` Judith Mendez
2024-04-18 22:14 ` [PATCH 6/7] counter: ti-eqep: Allow eQEP driver to be built for K3 devices Judith Mendez
2024-04-18 22:14 ` [PATCH 7/7] arm64: defconfig: Enable TI eQEP Driver Judith Mendez
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