From: "Christoph Müllner" <christoph.muellner@vrull.eu>
To: Xu Lu <luxu.kernel@bytedance.com>
Cc: paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, andy.chiu@sifive.com, guoren@kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
lihangjing@bytedance.com, dengliang.1214@bytedance.com,
xieyongji@bytedance.com, chaiwen.cc@bytedance.com,
Andrew Jones <ajones@ventanamicro.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [RFC 0/2] riscv: Idle thread using Zawrs extension
Date: Thu, 18 Apr 2024 14:26:12 +0200 [thread overview]
Message-ID: <CAEg0e7gDk6SFRh4oF0KsA7xZoMr7RuZXFWL8qD7rmM2cBDLwcg@mail.gmail.com> (raw)
In-Reply-To: <20240418114942.52770-1-luxu.kernel@bytedance.com>
On Thu, Apr 18, 2024 at 1:50 PM Xu Lu <luxu.kernel@bytedance.com> wrote:
>
> This patch series introduces a new implementation of idle thread using
> Zawrs extension.
This overlaps with the following series:
https://lore.kernel.org/all/20240315134009.580167-7-ajones@ventanamicro.com/
BR
Christoph
>
> The Zawrs[0] extension introduces two new instructions named WRS.STO and
> WRS.NTO in RISC-V. When software registers a reservation set using LR
> instruction, a subsequent WRS.STO or WRS.NTO instruction will cause the
> hart to stall in a low-power state until a store happens to the
> reservation set or an interrupt becomes pending. The difference between
> these two instructions is that WRS.STO will terminate stall after an
> implementation-defined timeout while WRS.NTO won't.
>
> This patch series implements idle thread using WRS.NTO instruction.
> Besides, we found there is no need to send a real IPI to wake up an idle
> CPU. Instead, we write IPI information to the reservation set of an idle
> CPU to wake it up and let it handle IPI quickly, without going through
> tranditional interrupt handling routine.
>
> [0] https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc
>
> Xu Lu (2):
> riscv: process: Introduce idle thread using Zawrs extension
> riscv: Use Zawrs to accelerate IPI to idle cpu
>
> arch/riscv/Kconfig | 24 +++++++
> arch/riscv/include/asm/cpuidle.h | 11 +---
> arch/riscv/include/asm/hwcap.h | 1 +
> arch/riscv/include/asm/processor.h | 31 +++++++++
> arch/riscv/include/asm/smp.h | 14 ++++
> arch/riscv/kernel/cpu.c | 5 ++
> arch/riscv/kernel/cpufeature.c | 1 +
> arch/riscv/kernel/process.c | 102 ++++++++++++++++++++++++++++-
> arch/riscv/kernel/smp.c | 39 +++++++----
> 9 files changed, 205 insertions(+), 23 deletions(-)
>
> --
> 2.20.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-04-18 12:26 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-18 11:49 [RFC 0/2] riscv: Idle thread using Zawrs extension Xu Lu
2024-04-18 11:49 ` [RFC 1/2] riscv: process: Introduce idle " Xu Lu
2024-04-18 15:05 ` Conor Dooley
2024-04-18 16:14 ` [External] " Xu Lu
2024-04-22 8:21 ` Conor Dooley
2024-04-18 19:10 ` Andrew Jones
2024-04-18 22:00 ` Samuel Holland
2024-04-18 22:09 ` Conor Dooley
2024-04-18 11:49 ` [RFC 2/2] riscv: Use Zawrs to accelerate IPI to idle cpu Xu Lu
2024-04-18 12:26 ` Christoph Müllner [this message]
2024-04-18 12:44 ` [External] Re: [RFC 0/2] riscv: Idle thread using Zawrs extension Xu Lu
2024-04-18 12:56 ` Christoph Müllner
2024-04-18 13:09 ` Xu Lu
2024-04-18 14:08 ` Conor Dooley
2024-04-18 14:10 ` Andrew Jones
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