From: "Cédric Le Goater" <clg@kaod.org>
To: Aditya Gupta <adityag@linux.ibm.com>,
Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
"Frédéric Barrat" <fbarrat@linux.ibm.com>
Subject: Re: [PATCH v2 02/10] ppc/pnv: Introduce 'PnvChipClass::chip_type'
Date: Fri, 26 Apr 2024 16:16:32 +0200 [thread overview]
Message-ID: <3ea873c8-3548-4a1b-84bd-ffe28ca19fc0@kaod.org> (raw)
In-Reply-To: <20240426110023.733309-3-adityag@linux.ibm.com>
On 4/26/24 13:00, Aditya Gupta wrote:
> Introduce 'PnvChipClass::chip_type' to easily get which Power chip is
> it.
> This helps generalise similar codes such as *_dt_populate, and removes
> duplication of code between Power11 and Power10 changes in following
> patches.
>
> Cc: Cédric Le Goater <clg@kaod.org>
> Cc: Frédéric Barrat <fbarrat@linux.ibm.com>
> Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>
> Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
> Cc: Nicholas Piggin <npiggin@gmail.com>
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
> hw/ppc/pnv.c | 5 +++++
> include/hw/ppc/pnv_chip.h | 10 ++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 6e3a5ccdec76..74e7908e5ffb 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1457,6 +1457,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */
> + k->chip_type = PNV_TYPE_POWER8E;
> k->cores_mask = POWER8E_CORE_MASK;
> k->num_phbs = 3;
> k->chip_pir = pnv_chip_pir_p8;
> @@ -1481,6 +1482,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */
> + k->chip_type = PNV_TYPE_POWER8;
> k->cores_mask = POWER8_CORE_MASK;
> k->num_phbs = 3;
> k->chip_pir = pnv_chip_pir_p8;
> @@ -1505,6 +1507,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */
> + k->chip_type = PNV_TYPE_POWER8NVL;
> k->cores_mask = POWER8_CORE_MASK;
> k->num_phbs = 4;
> k->chip_pir = pnv_chip_pir_p8;
> @@ -1779,6 +1782,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
> static const int i2c_ports_per_engine[PNV9_CHIP_MAX_I2C] = {2, 13, 2, 2};
>
> k->chip_cfam_id = 0x220d104900008000ull; /* P9 Nimbus DD2.0 */
> + k->chip_type = PNV_TYPE_POWER9;
> k->cores_mask = POWER9_CORE_MASK;
> k->chip_pir = pnv_chip_pir_p9;
> k->intc_create = pnv_chip_power9_intc_create;
> @@ -2091,6 +2095,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
> static const int i2c_ports_per_engine[PNV10_CHIP_MAX_I2C] = {14, 14, 2, 16};
>
> k->chip_cfam_id = 0x120da04900008000ull; /* P10 DD1.0 (with NX) */
> + k->chip_type = PNV_TYPE_POWER10;
> k->cores_mask = POWER10_CORE_MASK;
> k->chip_pir = pnv_chip_pir_p10;
> k->intc_create = pnv_chip_power10_intc_create;
> diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> index 8589f3291ed3..ebfe82b89537 100644
> --- a/include/hw/ppc/pnv_chip.h
> +++ b/include/hw/ppc/pnv_chip.h
> @@ -17,12 +17,21 @@
> OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass,
> PNV_CHIP)
>
> +typedef enum PnvChipType {
> + PNV_TYPE_POWER8E, /* AKA Murano (default) */
> + PNV_TYPE_POWER8, /* AKA Venice */
> + PNV_TYPE_POWER8NVL, /* AKA Naples */
> + PNV_TYPE_POWER9, /* AKA Nimbus */
> + PNV_TYPE_POWER10,
> +} PnvChipType;
Nope.
> +
> struct PnvChip {
> /*< private >*/
> SysBusDevice parent_obj;
>
> /*< public >*/
> uint32_t chip_id;
> +
> uint64_t ram_start;
> uint64_t ram_size;
>
> @@ -137,6 +146,7 @@ struct PnvChipClass {
> SysBusDeviceClass parent_class;
>
> /*< public >*/
> + PnvChipType chip_type;
> uint64_t chip_cfam_id;
> uint64_t cores_mask;
> uint32_t num_pecs;
Adding an enum type under PnvChipClass which is a type already
looks wrong. Please find another way. It is possible I am sure.
Thanks,
C.
next prev parent reply other threads:[~2024-04-26 14:17 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-26 11:00 [PATCH v2 00/10] Power11 support for QEMU Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 01/10] ppc/pseries: Add Power11 cpu type Aditya Gupta
2024-04-26 14:27 ` Cédric Le Goater
2024-04-26 17:05 ` Aditya Gupta
2024-04-26 17:41 ` Cédric Le Goater
2024-05-01 13:22 ` Aditya Gupta
2024-05-01 14:39 ` Aditya Gupta
2024-04-26 17:12 ` Aditya Gupta
2024-04-26 17:28 ` Cédric Le Goater
2024-04-26 17:44 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 02/10] ppc/pnv: Introduce 'PnvChipClass::chip_type' Aditya Gupta
2024-04-26 14:16 ` Cédric Le Goater [this message]
2024-04-26 17:18 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 03/10] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine Aditya Gupta
2024-04-26 14:55 ` Cédric Le Goater
2024-04-26 17:34 ` Aditya Gupta
2024-04-26 17:53 ` Cédric Le Goater
2024-05-01 13:28 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 04/10] ppc/pnv: Add HOMER for POWER11 Aditya Gupta
2024-04-26 14:32 ` Cédric Le Goater
2024-04-26 17:38 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 05/10] ppc/pnv: Add a LPC controller " Aditya Gupta
2024-04-26 14:32 ` Cédric Le Goater
2024-04-26 17:38 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 06/10] ppc/pnv: Add OCC for Power11 Aditya Gupta
2024-04-26 14:33 ` Cédric Le Goater
2024-04-26 17:38 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 07/10] ppc/pnv: Add a PSI bridge model " Aditya Gupta
2024-04-26 14:33 ` Cédric Le Goater
2024-04-26 17:39 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 08/10] ppc/pnv: Add SBE " Aditya Gupta
2024-04-26 14:33 ` Cédric Le Goater
2024-04-26 17:39 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 09/10] ppc: Make Power11 as default cpu type for 'pseries' and 'powernv' Aditya Gupta
2024-04-26 14:32 ` Cédric Le Goater
2024-04-26 17:40 ` Aditya Gupta
2024-04-29 1:44 ` David Gibson
2024-05-01 13:29 ` Aditya Gupta
2024-05-03 4:52 ` Nicholas Piggin
2024-05-03 6:53 ` Aditya Gupta
2024-04-26 11:00 ` [PATCH v2 10/10] ppc/pnv: Update skiboot.lid to support Power11 Aditya Gupta
2024-04-26 14:38 ` Cédric Le Goater
2024-04-26 17:42 ` Aditya Gupta
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