From: "Inès Varhol" <ines.varhol@telecom-paris.fr>
To: peter maydell <peter.maydell@linaro.org>
Cc: qemu-devel <qemu-devel@nongnu.org>,
qemu-arm <qemu-arm@nongnu.org>, "Thomas Huth" <thuth@redhat.com>,
"Arnaud Minier" <arnaud.minier@telecom-paris.fr>,
"Laurent Vivier" <lvivier@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH 1/4] hw/misc: Create STM32L4x5 SYSCFG clock
Date: Tue, 7 May 2024 19:30:21 +0200 (CEST) [thread overview]
Message-ID: <477144958.4192868.1715103021362.JavaMail.zimbra@enst.fr> (raw)
In-Reply-To: <CAFEAcA9kOhzn+9pXOTBwRdLmMcFfPQzwwX6Nv_90RLPiUH6JAA@mail.gmail.com>
----- Le 7 Mai 24, à 11:50, peter maydell peter.maydell@linaro.org a écrit :
> On Sun, 5 May 2024 at 15:06, Inès Varhol <ines.varhol@telecom-paris.fr> wrote:
>>
>> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
>
> In general you should try to avoid commits with no commit message.
> Sometimes there really isn't anything to say beyond what the
> subject line is, but that should be the exception rather than
> the usual thing.
Hello,
Understood, I'll add messages.
>
>> ---
>> include/hw/misc/stm32l4x5_syscfg.h | 1 +
>> hw/arm/stm32l4x5_soc.c | 2 ++
>> hw/misc/stm32l4x5_syscfg.c | 26 ++++++++++++++++++++++++++
>> 3 files changed, 29 insertions(+)
>>
>> diff --git a/include/hw/misc/stm32l4x5_syscfg.h
>> b/include/hw/misc/stm32l4x5_syscfg.h
>> index 23bb564150..c450df2b9e 100644
>> --- a/include/hw/misc/stm32l4x5_syscfg.h
>> +++ b/include/hw/misc/stm32l4x5_syscfg.h
>> @@ -48,6 +48,7 @@ struct Stm32l4x5SyscfgState {
>> uint32_t swpr2;
>>
>> qemu_irq gpio_out[GPIO_NUM_PINS];
>> + Clock *clk;
>> };
>>
>> #endif
>> diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c
>> index 38f7a2d5d9..fb2afa6cfe 100644
>> --- a/hw/arm/stm32l4x5_soc.c
>> +++ b/hw/arm/stm32l4x5_soc.c
>> @@ -236,6 +236,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc,
>> Error **errp)
>>
>> /* System configuration controller */
>> busdev = SYS_BUS_DEVICE(&s->syscfg);
>> + qdev_connect_clock_in(DEVICE(&s->syscfg), "clk",
>> + qdev_get_clock_out(DEVICE(&(s->rcc)), "syscfg-out"));
>> if (!sysbus_realize(busdev, errp)) {
>> return;
>> }
>> diff --git a/hw/misc/stm32l4x5_syscfg.c b/hw/misc/stm32l4x5_syscfg.c
>> index a5a1ce2680..a82864c33d 100644
>> --- a/hw/misc/stm32l4x5_syscfg.c
>> +++ b/hw/misc/stm32l4x5_syscfg.c
>> @@ -26,6 +26,10 @@
>> #include "trace.h"
>> #include "hw/irq.h"
>> #include "migration/vmstate.h"
>> +#include "hw/clock.h"
>> +#include "hw/qdev-clock.h"
>> +#include "qapi/visitor.h"
>> +#include "qapi/error.h"
>> #include "hw/misc/stm32l4x5_syscfg.h"
>> #include "hw/gpio/stm32l4x5_gpio.h"
>>
>> @@ -202,6 +206,14 @@ static void stm32l4x5_syscfg_write(void *opaque, hwaddr
>> addr,
>> }
>> }
>>
>> +static void clock_freq_get(Object *obj, Visitor *v,
>> + const char *name, void *opaque, Error **errp)
>> +{
>> + Stm32l4x5SyscfgState *s = STM32L4X5_SYSCFG(obj);
>> + uint32_t clock_freq_hz = clock_get_hz(s->clk);
>> + visit_type_uint32(v, name, &clock_freq_hz, errp);
>> +}
>> +
>> static const MemoryRegionOps stm32l4x5_syscfg_ops = {
>> .read = stm32l4x5_syscfg_read,
>> .write = stm32l4x5_syscfg_write,
>> @@ -225,6 +237,18 @@ static void stm32l4x5_syscfg_init(Object *obj)
>> qdev_init_gpio_in(DEVICE(obj), stm32l4x5_syscfg_set_irq,
>> GPIO_NUM_PINS * NUM_GPIOS);
>> qdev_init_gpio_out(DEVICE(obj), s->gpio_out, GPIO_NUM_PINS);
>> + s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0);
>> + object_property_add(obj, "clock-freq-hz", "uint32", clock_freq_get, NULL,
>> + NULL, NULL);
>
> Why do we need this property? The clock on this device is an input,
> so the device doesn't control its frequency.
Using a QOM property allows to read the clock frequency from a QTest.
(npcm7xx_pwm-test.c does this, I didn't find other examples of reading a
frequency)
Best regards,
Inès Varhol
next prev parent reply other threads:[~2024-05-07 17:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-05 14:05 [PATCH 0/4] Check clock connection between STM32L4x5 RCC and peripherals Inès Varhol
2024-05-05 14:05 ` [PATCH 1/4] hw/misc: Create STM32L4x5 SYSCFG clock Inès Varhol
2024-05-07 9:50 ` Peter Maydell
2024-05-07 17:30 ` Inès Varhol [this message]
2024-05-05 14:05 ` [PATCH 2/4] hw/gpio: Handle clock migration in STM32L4x5 gpios Inès Varhol
2024-05-06 9:38 ` Philippe Mathieu-Daudé
2024-05-05 14:05 ` [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency Inès Varhol
2024-05-06 9:34 ` Philippe Mathieu-Daudé
2024-05-06 9:43 ` Philippe Mathieu-Daudé
2024-05-07 9:54 ` Peter Maydell
2024-05-08 14:08 ` Philippe Mathieu-Daudé
2024-05-05 14:05 ` [PATCH 4/4] tests/qtest: Check STM32L4x5 clock connections Inès Varhol
2024-05-06 4:16 ` Thomas Huth
2024-05-06 17:57 ` Inès Varhol
-- strict thread matches above, loose matches on Subject: below --
2024-05-07 18:55 [PATCH 0/4] Check clock connection between STM32L4x5 RCC and peripherals Inès Varhol
2024-05-07 18:55 ` [PATCH 1/4] hw/misc: Create STM32L4x5 SYSCFG clock Inès Varhol
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